基于51单片机的英文论文
基于51单片机步进电机毕业设计外文资料原文与译文
外文原文Stepping motor application and controlStepping motor is an electrical pulse will be converted into angular displacement of the implementing agencies.Put it in simple language-speaking:When the stepper drive pulse signal to a receiver,it drives stepper motor rotation direction by setting a fixed point of view(and the step angel).You can control the number of pulses to control the amount of angular displacement,so as to achieve the purpose of accurate positioning;At the same time,you can by controlling the pulse frequency to control the motor rotation speed and acceleration,so as to achieve the purpose of speed.Stepping motor directly from the AC-DC power supply,and must use special equipment-stepper motor drive. Stepping motor drive system performance,in addition to their own performance with the motor on the outside.but also to a large extent depend on the drive is good or bad.A typical stepper motor drivesystem is operated by the stepper motor controller,stepper motor drives and stepper motor body is composed of therr parts. Stepping motor controller stepper pulse and direction signal,each made of a pulse,stepper motor-driven stepper motor drives a rotor rotating step angle,that is,step-by=step further.High or low speed stepper motor,or speed,or deceleration,start or stop pulses are entirely dependent on whether the level or frequency.Decide the direction of the signal controller stepper motor clockwise or counterclockwise rotation. Typically,the stepper motor drive circuit from the logic control,power driver circuit,protection circuit and power components. Stepping motor drive controller,once received from the direction of the signal and step pulse,the control circuit on a pre-determined way of the electrical power-phase stepper motor drive controller,once received from the direction of the signal and step pulse,the control circuit on a pre-determined way of the electrical power=phase stepper motor excitation windings of the conduction or cut-off signal.Control circuit output signal power amplifier,which is stepper motor driven power drive part.Power stepper motor drive circuit to control the input current winding to form a space for rotating magnetic filed excitation,the rotor-driven movement.Protection circuit in the event of short circuit,overload,overheating,such as failure to stop the rapid and motor.Motor is usually for the permanent rotor,when the current flows through the stator windings,the stator windings produce a magnetic field vector.The magnetic field will lead to a rotor angle of rotation,making a pair of rotor and stator magnetic field direction of the magnetic field direction.When the stator rotating magnetic field vector from a different angle.Also as the rotor magnetic field to a point of view,An electrical pulse for each input,the motor rotation angle step,Tts output and input of the angular displacement is proportional to the pulses,with pulse frequency proportional to speed.Power to change the order of winding,the electrical will be reversed.We can,therefore,control the pulse number,frequency and electrical power windings of each phase to control the order of rotation of stepper motor.Stepping motor types:Permanent magnet(PM).Magnetic generally two-phase stepper,torque and are smaller ab=nd generally stepping angle of 7.5 degrees or 15 degrees;put more wind for air-conditioning. Reactive (VR),the domestic general called BF,have a common three-phase reaction,step angle of 1.5 degrees;also have five-phase reaction.Noise,no torque has been set at a large number of out.Hybrid(HB),conmmon two-phase hybrid,five-phase hybrid,therr-phase hybrid,four-phasehybrid,two-phase can be common with the four-phase drive,five-phase ,three-phase must be used with their drives;Two-phase, four-phase hybrid step angle is 1.8 degrees more than a small size,great distance,and low noise;Five-phase hybrid stepping motor is generally 0.72,the motor step angle small,high resolution,but the complexity of drive circuits,wiring problems,such as the 5-phase system of 10 lines.Three-phase hybrid stepping motor step angle of 1.2 degrees,but according to the use of 1.8 degrees,the three-phase hybrid more pole will help electric folder symmetric angle,it can be more than two-phase,five-phase high accuracy,the error even smaller,run more smoothly. Stepper motor to maintain torque:stepper motor power means no rotation,the stator locked rotoe torque.It is a stepper motor,one of the most important parameters,usually in the low-speed stepper motor torque at the time of close to maintain the torque.As the stepper motor output torque increases with the speed of constant attention,the output power also increases with the speed of change,so as to maintain torque on the stepper motor to measure the parameters of one of the most important.For example,when people say that the stepper motor 2N.m,in the absence of special circumstances that means for maintaining the torque of the stepper motor 2N.m.Precision stepper motoes:stepper motor step angle accuracy of 3-5%,not cumulative. Stepper motor to allow the minimum amount of surface temperature: Stepper motor causes the motor remperature is too high the first magnetic demagnetization,resulting in loss of torque dowm even further,so the motor surface temperature should be the maximum allowed depending in the motor demagnetization of magnetic material pints; enerally speaking,the magnetic demagnetization points are above 130 degrees Clesius,and some even as high as 200degrees Celsius,so the stepper motor surface temperature of 80-90 degrees Celsius is normal. Start frequency of no-load:the stepper motor in case of no-load to the normal start of the pulse frequency,if the pulse frequency is higher than the value of motor does not start,possible to lose steps or blocking.In the case of the load,start frequency should be to accelerate the process,that is ,the lower frequency to start,and then rose to a certain acceleration of the desired frequency (motor speed from low rise to high-speed).Step angle:that is to send a pulse,the electrical angle corresponding to rotation.Torque positioning: positioning torque stepper motor does not refer to the case of electricity,locked rotor torque stator.Operating frequency:step-by-step stpper motor can run without losing thehighest frequency. Subdivision Drive: stepper motor drives the main aim is to weaken or eliminate low-frequency vibration of the stepper motor to improve the accuracy of the motor running.Reduce noise.If the step angle is 1.8 degrees(full step) the two-phase hybrid stepping motor,if the breakdown of the breakdown of the number of drives for the 8,then the operation of the electrical pulse for each resolution of 0.072 degrees,the precision of motor can reach or close to 0.225 degrees,also depends on the breakdown of the breakdown of the drive current control accuracy and other factors,the breakdown of the number of the more difficult the greater the precision of control.中文步进电机应用和控制步进电机是将电脉冲转换成角位移的执行机构。
51单片机英文文献及翻译
Data Memory
数据存储器
Te context with microcontrollers,
术语“数据存储器”用于微控制器。
The memory which stores data,i.e.RAM,is called data memory.
用来存储数据的存储器，即RAM，被称作数据存储器
The diffenent versions of 8048 series of microcontrollers microcontrollers contain 64,128.256 bytes of RAM.
8048系列的不同版本的微控制器包含64、128、256字节的RAM。
Data Memory The term data memory is used in the context with microcontrollers,The memory which stores data,i.e.RAM,is called data memory.The diffenent versions of 8048 series of microcontrollers microcontrollers contain 64,128.256 bytes of RAM.The 8048AH,8049AH and 8050AH contain 64,128 and 256 bytes of RAM respectively.64/128/256 bytes of RAM is used either as read/write memory or general-purpose registers.
There is need of cyclical reading (lower than 1 minute periods) of the actual values from the real-time clock and the sensors for pressure and temperature, and to store the read values into the microcontroller’s memory. The communication with the real-time clock and the sensors is possible with the use of I2C interface and the previously defined in the specifications protocols for reading and writing.
基于51单片机的英文论文
the Real-Time Clock Based on AT89S51Author: Class: ; Name:Abstract: Digital clock has become indispensable in people's daily life, it is widely used in public places such as the family and the office, and it gives people great convenience in study, work and entertainment. Due to the development of digital integrated circuit technology and the advanced quartz technology, the digital clock has advantages of accurate, stable performance and easy to carry. It is also used in automatic control, automatic signal and etc. Although the digital clocks are already sold on the market, but the single chip microcomputer timer function also can complete the design of the digital clock circuit. So it is necessary to the design of the digital clock. By single chip microcomputer internal timer timing precision, the four digital tube display year, month, day, time, minutes and seconds. With the keyboard, users can be preset time, display the time, set the content, set time operation mode, etc.Keywords: AT89S51; clock; digital tube; keyboard switch; function Introduction: AT89S51 is a very suitable for the beginners of the single chip microcomputer, it is fully compatible with the traditional instruction system of 8051,8031.Can realize the following functions:1. Use the keyboard switch, show respectively the seconds, minutes, hour, day, month, year;2. Use the keyboard preset year, month, day, time, minutes and seconds;3. Can the countdown, the countdown units for minutes;4. Every second , the four decimal point shine once;5. Timing alarm clock function, a buzzer call reminder.6. The clock error daily is not more than 1 second.Methods:1.The minimum single chip microcomputer systemAT89S51 has the following standard functions: 8 k bytes Flash, 256 bytes RAM, and 32-bit I/O lines, a watchdog timer, two data pointer, three 16 timer/counter, a level 6 vector 2 interrupt structure, full duplex serial port, piece of crystals and the clock circuit . In idle mode, the CPU stops working, allows RAM, timer/counter, serial port and interrupt continue to work. In fall protection mode, RAM content are stored, has been frozen, single chip microcomputer stops all work, until the next interruption or hardware reset.2.The displayDisplay uses the method of dynamic LED digital tube to display, P0 port output characters code to display, position codes are controlled by P2.4 ~ P2.7. The cost of the dynamic display is very low, but the dynamic display occupies more resources of the CPU interface. The design uses 12 lines. In addition by the dynamic display refreshing, which takes part of the work time of the CPU. So for some higher demand control system, we should consider the time taken by the display.3.The keyboardKeyboard uses 4 * 4 matrix keyboard, by P2.0 ~ P2.3 for row line, P1.4 ~ P1.7 for column line, phalanxes of 4 * 4 are made, and using the method of scanning software can determine the key value of each key. In the design, each key can be used to input data and commands.4.The power supplyControl power supply can be provided by DC 12V voltage, the power supply can be used by stepping motor driver, at the same time through the three linear stabilizer 7805 to provide other circuit power supply; If you don't need to use stepper motor, the control system of the DC5V power supply can be collected from ordinary USB interface of the computer, as long as the USB connects a computer USB port, the other connects two core power interface of controller.5.Programming interfaceMicroprocessor uses AT89S51. AT89S51 has ISP online programming function, and P1.5 ~ P1.7 are for the programming interface and software compilation and debugging includes two processes:1. By using keil software programming, input source program, and then compile until no grammar mistakes, using compilation command hex into system files(suffix:hex).2. After connecting the power cord and programming line, start USBASP programming software. Select the chip microprocessors model in the selection of AT89S51. Open and load in the flash. Load in the hex into system files. Use erase commands to erase chip in the original program, with programming command to write new programs in AT89S51. After finished, reset the program running, observing the consequence. If there is any error, it is needed to re-open the Medwin and modify the source program, to create the hex file, and then repeat the above operation, to meet the design requirements.Results:Key:| 1 | 2 | 3 | 分秒|| 4 | 5 | 6 | 时分|| 7 | 8 | 9 | 月日|| 确定| 0 | 倒计时| 年|#include <reg51.h>#include<stdio.h>#define uchar unsigned charsbit P1_3=P1^3;sbit P3_2=P3^2;unsigned char t=0;unsigned char t1=50;unsigned char t2=59;unsigned char t3=23;unsigned char t4=7;unsigned char t5=60;unsigned char t6=60;unsigned char k1=4;uchar i;uchar c;uchar a[10]={0x81,0xED,0x43,0x49,0x2D,0x19,0x11,0xCD,0x01,0x09};uchar p[5];void delay(int MS){int i,j;for( i=0;i<MS;i++)for(j=0;j<1141;j++);}uchar encoder(uchar num) {uchar i;switch(num){case 0x11:i=0x11;break;case 0x12:i=0x12;break;case 0x14:i=0x13;break;case 0x18:i=0x14;break;case 0x21:i=0x15;break;case 0x22:i=0x09;break;case 0x24:i=0x06;break;case 0x28:i=0x03;break;case 0x41:i=0x00;break;case 0x42:i=0x08;break;case 0x44:i=0x05;break;case 0x48:i=0x02;break;case 0x81:i=0x16;break;case 0x82:i=0x07;break;case 0x84:i=0x04;break;case 0x88:i=0x01;break;}return(i);}uchar key_value(){uchar tem,s,t,n;P1&=0x0f;P2|=0x0f;;tem=P2;tem|=0xf0;s=~tem;P2&=0xf0;P1|=0xf0;;tem=P1;tem|=0x0f;t=~tem;s=s+t;n=encoder(s);return(n);}uchar key(void){uchar i;P2|=0x0f;P1&=0x0f;;i=P2;i|=0xf0;i=~i;return(i);}void show1(uchar i,uchar j){P0=a[j];P2=P2&0x0f;P2|=1<<(i+3);}void show(uchar i,uchar j,uchar k,uchar l){uchar a[10]={0x81,0xED,0x43,0x49,0x2D,0x19,0x11,0xCD,0x01,0x09};uchar b,c,d,e;b=a[i];c=a[j];d=a[k];e=a[l];P2&=0x0f;P2=0x1f;P0=b;delay(1);P2&=0x0f;P2=0x2f;P0=c;delay(1);P2=0x4f;P0=d;delay(1);P2=0x8f;P0=e;delay(1);}void year(void){while(key()==0){show1(4,2);delay(1);show1(3,0);delay(1);show1(2,1);delay(1);show1(1,3);delay(1);}}void monthday(void) {TMOD=0X01;TH0=0x4c;TR0=1;IE=0X82;TMOD=0x01;while(key()==0){show1(4,0);delay(1);show1(3,1);delay(1);show1(2,0);delay(1);show1(1,t4%10);delay(1);}}void hourminute(void) {TMOD=0X01;TH0=0x4c;TL0=0x00;TR0=1;IE=0X82;TMOD=0x01;while(key()==0){show1(4,t3/10);delay(1);show1(3,t3%10);delay(1);show1(2,t2/10);delay(1);show1(1,t2%10);delay(1);}}void minutesecond() {TMOD=0X01;TH0=0x4c;TL0=0x00;TR0=1;IE=0X82;while(key()==0){show1(4,t2/10);delay(1);show1(3,t2%10);delay(1);show1(2,t1/10);delay(1);show1(1,t1%10);delay(1);}}void jishi(void){TMOD=0X01;TH0=0x4c;TL0=0x00;TR0=1;IE=0X82;TMOD=0x01;while(key()==0){show1(2,t5/10);delay(1);show1(1,t5%10);delay(1);}}void shuru(void) {--k1;if(k1==0)k1=4; while(key()==0){p[k1]=c;show1(4,c);delay(1);}}void sure(void){while(key()==0){show(p[1],p[2],p[3],p[4]);delay(1);}}void timer0(void) interrupt 1 {t++;if(t==20){t=0;t1++;t5--;if(t5==0){while(key()==0){show1(2,0);delay(1);show1(1,0);delay(1);P3_2=~P3_2;delay(1);P1_3=~P1_3;delay(1);}}t6--;if(t6==0){}if(t1==60){t1=0;t2++;if(t2==60){t2=0;t3++;if(t3==24){t3=1;t4++;if(t4==30)t4==1;}}}}TH0=0x4c;TL0=0x00;}void main(){while(1){i=key();while(i!=0){if(i==key()){uchar k;k=key_value();c=k;if(c==0x11)year();elseif(c==0x12)monthday();elseif(c==0x13)hourminute();elseif(c==0x14)minutesecond();elseif(c==0x15)jishi();elseif(c==0x16)sure();elseif(c==0x00||0x01||0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x09) shuru();else;}elsebreak;}}}Conclusion: Through the single chip microcomputer can accurately realize the accurate per time, can realize the countdown, display determined year, month, day, hour, minutes, seconds, and some other functions.Reference:[1]郭晓林.基于单片机的电子时钟设计[J].中国科技博览，2010，（9).[2]何立民.单片机应用技术选编（11）［M］．北京航天航空大学出版社，2006．[3]刘守义.单片机应用技术［M］．西安电子科技大学出版社，2009.[4]时钟芯片DS1302中文资料，/info/commonIC/0083003.html。
关于单片机的英文文献
The General Situation of AT89C51Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Platform Engineering department developed an object-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.1.1 IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU withabove average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially prohibitive. Redesign costs can run as high as a $500K, much more if the fix means 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components is extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.1.2 The AT89C51 provides the following standard features:4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture, a full duple serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1-3Pin DescriptionVCC Supply voltage.GND Ground.Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs .Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 alsoreceives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.Port 1：Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3：Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special feature soft the AT89C51 as listed below:RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG：Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALEpulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin all receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2:Output from the inverting oscillator amplifier. Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quarts crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle Mode In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to externalmemory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFR but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. The AT89C51 code memory array is programmed byte-by byte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.2 Programming AlgorithmBefore programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.2.1Ready/Busy:The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify:If lock bits LB1 and LB2 have not been programmed, the programmedcode data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.2.2 Chip Erase:The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.2.3 Reading the Signature Bytes:The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned areas follows : (030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programming2.4 Programming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion. A microcomputer interface converts information between two forms. Outside the microcomputer the information handled by an electronic system exists as a physical signal, but within the program, it is represented numerically. The function of any interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps. An analog-to-digital converter is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section of the。
关于单片机的英文文献
The General Situation of AT89C51Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Platform Engineering department developed an object-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.1.1 IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency response, abilityto service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially prohibitive. Redesign costs can run as high as a $500K, much more if the fix means 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components is extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.1.2 The AT89C51 provides the following standard features:4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture, a full duple serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1-3Pin DescriptionVCC Supply voltage.GND Ground.Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs .Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.Port 1：Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3：Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special feature soft the AT89C51 as listed below:RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG：Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin all receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2:Output from the inverting oscillator amplifier. Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quarts crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle Mode In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the devicenormally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFR but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. The AT89C51 code memory array is programmed byte-by byte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.2 Programming AlgorithmBefore programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.2.1Ready/Busy:The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify:If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.2.2 Chip Erase:The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.2.3 Reading the Signature Bytes:The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned areas follows : (030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programming2.4 Programming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion. A microcomputer interface converts information between two forms. Outside the microcomputer the information handled by an electronic system exists as a physical signal, but within the program, it is represented numerically. The function ofany interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps. An analog-to-digital converter is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section of the microcomputer itself. Output interfaces take a similar form, the obvious difference being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface and performs the scaling numbers which may be needed for digital-to-analog converter. This subroutine passes information in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned to a form suitable for operating an actuator. The signals used within microcomputer circuits are almost always too small to be connected directly to the outside world” and some kind of interface must be used to translate them to a more appropriate form. The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We have seen that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator. To solve real-world problems, a microcontroller must have more than just a CPU, a program, and a data memory. In addition, it must contain hardware allowing the CPU to access information from the outside world. Once the CPU gathers information and processes the data, it must also be able to effect change on some portion of the outside world. These hardware devices, called peripherals, are the CPU’s window to the outside.The most basic form of peripheral available on microcontrollers is the general purpose I70 port. Each of the I/O pins can be used as either an input or an output. The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be drivento either a logic one or a logic zero by using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions. Some type of serial unit is included on microcontrollers to allow the CPU to communicate bit-serially with external devices. Using a bit serial format instead of bit-parallel format requires fewer I/O pins to perform the communication function, which makes it less expensive, but slower. Serial transmissions are performed either synchronously or asynchronously.。
外文翻译--基于51单片机温度报警器的设计(适用于毕业论文外文翻译+中英文对照)
外文翻译--基于51单片机温度报警器的设计(适用于毕业论文外文翻译+中英文对照)XXX: Design of a Temperature Alarm Based on 51 MCUDepartment: n EngineeringMajor: Measurement and Control Technology and nClass:Student ID:Name:Supervisor:Date:A microcontroller。
also known as a single-chip computer system。
XXX its ns being integrated on a small chip。
it has most of the components needed for a complete computer system。
such as CPU。
memory。
internal and external bus systems。
and mostof them also have external storage。
At the same time。
it integrates XXX interfaces。
timers。
real-time clocks。
etc。
The most XXX integrate sound。
image。
ork。
and complex input-output systems on a single chip.XXX used in the industrial control field。
Microcontrollers XXX CPUs inside the chip。
The original design concept was to integrate a large number of peripheral devices and CPUs on a chip to make the computer system XXX's Z80 was the first processor designed according to this concept。
关于单片机的英文文献(可编辑修改word版)
The General Situation of AT89C51Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Platform Engineering department developed an object-oriented multi- threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.1.1IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension,antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost- effective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially prohibitive. Redesign costs can run as high as a $500K, much more if the fix means 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components is extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.1.2The AT89C51 provides the following standard features:4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16- bittimer/counters, a five vector two-level interrupt architecture, a full duple serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1-3Pin DescriptionVCC Supply voltage.GND Ground.Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs .Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.Port 1：Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high- order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8- bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3：Port 3 is an 8-bit bi-directional I/O port with internalpull ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special feature soft the AT89C51 as listed below:RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG：Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin all receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2:Output from the inverting oscillator amplifier. Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on- chip oscillator, as shown in Figure 1. Either a quarts crystal orceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle Mode In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power- down is a hardware reset. Reset redefines the SFR but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. The AT89C51 code memory array is programmed byte-by byte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.2 Programming AlgorithmBefore programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines. 3.Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.2.1Ready/Busy:The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify:If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.2.2Chip Erase:The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.2.3Reading the Signature Bytes:The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 andP3.7 must be pulled to a logic low. The values returned areas follows :(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programming2.4Programming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion. A microcomputer interface converts information between two forms. Outside the microcomputer the information handled by an electronic system exists as a physical signal, but within the program, it is represented numerically. The function of any interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between the external and internal forms is carried out in a number of steps. An analog-to-digital converter is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section of the microcomputer itself. Output interfaces take a similar form, the obvious difference being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface and performs the scaling numbers which may be needed for digital-to- analog converter. This subroutine passes information in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned to a form suitable for operating an actuator. The signals used within microcomputer circuits are almost always too small to be con nected directly to the outside world” and some kind of interface must be used to translate them to a more appropriate form. The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers.We have seen that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator. To solve real-world problems, a microcontroller must have more than just a CPU, a program, and a data memory. In addition, it must contain hardware allowing the CPU to access information from the outside world. Once the CPU gathers information and processes the data, it must also be able to effect change on some portion of the outside world. These hardware devices, called peripherals, are the CPU’s window to the outside.The most basic form of peripheral available on microcontrollers is the general purpose I70 port. Each of the I/O pins can be used as either an input or an output. The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be driven to either a logic one or a logic zero by using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions. Some type of serial unit is included on microcontrollers to allow the CPU to communicate bit-serially with external devices. Using a bit serial format instead of bit-parallel format requires fewer I/O pins to perform the communication function, which makes it less expensive, but slower. Serial transmissions are performed either synchronously or asynchronously.。
关于单片机的英文文献
The General Situation of AT89C51Microcontrollers are used in a multitude of commercial applications such as modems, motor-control systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such high-speed event-based applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the component and at the system level. Intel Platform Engineering department developed an object-oriented multi-threaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of this environment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental components, and how to use AT89C51.IntroductionThe 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations. MCS 51 microcontrollers are typically used for high-speed event control systems. Commercial applications include modems, motor-control systems, printers, photocopiers, air conditioner control systems, disk drives, and medical instruments. The automotive industry use MCS 51 microcontrollers in engine-control systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced on-chip peripheral functions set, such as automotive power-train control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable cost-effective controller with a low interrupt latency response, abilityto service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission critical applications such as an autopilot or anti-lock braking system, mistakes are financially prohibitive. Redesign costs can run as high as a $500K, much more if the fix means 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of components is extremely expensive, as the devices are typically sealed in modules with a total value several times that of the component. To mitigate these problems, it is essential that comprehensive testing of the controllers be carried out at both the component level and system level under worst case environmental and voltage conditions. This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully. Intel Chandler Platform Engineering group provides post silicon system validation (SV) of various micro-controllers and processors. The system validation process can be broken into three major parts. The type of the device and its application requirements determine which types of testing are performed on the device.The AT89C51 provides the following standard features:4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture, a full duple serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt sys -tem to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1-3Pin DescriptionVCC Supply voltage.GND Ground.Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs .Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.Port 1：Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX@DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3：Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special feature soft the AT89C51 as listed below:RST：Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG：Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable is the read strobe to external program memory. When theAT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPP：External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin all receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2:Output from the inverting oscillator amplifier. Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quarts crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle Mode In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the devicenormally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFR but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. The AT89C51 code memory array is programmed byte-by byte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.2 Programming AlgorithmBefore programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following . Input the desired memory location on the address . Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals.4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on . Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.Busy:The progress of byte programming can also be monitored by the RDY/BSY output signal. is pulled low after ALE goes high during programming to indicate BUSY. is pulled high again when programming is done to indicate READY.Program Verify:If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.Chip Erase:The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes:The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that and must be pulled to a logic low. The values returned areas follows : (030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programmingProgramming InterfaceEvery code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion. A microcomputer interface converts information between two forms. Outside the microcomputer the information handled by an electronic system exists as a physical signal, but within the program, it is represented numerically. The function of any interface can be broken down into a number of operations which modify the data in some way, so that the process of conversion between theexternal and internal forms is carried out in a number of steps. An analog-to-digital converter is used to convert a continuously variable signal to a corresponding digital form which can take any one of a fixed number of possible binary values. If the output of the transducer does not vary continuously, no ADC is necessary. In this case the signal conditioning section must convert the incoming signal to a form which can be connected directly to the next part of the interface, the input/output section of the microcomputer itself. Output interfaces take a similar form, the obvious difference being that here the flow of information is in the opposite direction; it is passed from the program to the outside world. In this case the program may call an output subroutine which supervises the operation of the interface and performs the scaling numbers which may be needed for digital-to-analog converter. This subroutine passes information in turn to an output device which produces a corresponding electrical signal, which could be converted into analog form using a DAC. Finally the signal is conditioned to a form suitable for operating an actuator. The signals used within microcomputer circuits are almost always too small to be connected directly to the outside world” and some kind of interface must be used to translate them to a more appropriate form. The design of section of interface circuits is one of the most important tasks facing the engineer wishing to apply microcomputers. We have seen that in microcomputers information is represented as discrete patterns of bits; this digital form is most useful when the microcomputer is to be connected to equipment which can only be switched on or off, where each bit might represent the state of a switch or actuator. To solve real-world problems, a microcontroller must have more than just a CPU, a program, and a data memory. In addition, it must contain hardware allowing the CPU to access information from the outside world. Once the CPU gathers information and processes the data, it must also be able to effect change on some portion of the outside world. These hardware devices, called peripherals, are the CPU’s window to the outside.The most basic form of peripheral available on microcontrollers is the general purpose I70 port. Each of the I/O pins can be used as either an input or an output. The function of each pin is determined by setting or clearing corresponding bits in a corresponding data direction register during the initialization stage of a program. Each output pin may be driven to either a logic one or a logic zero by using CPU instructions to pin may be viewed (or read.) by the CPU using program instructions. Some typeof serial unit is included on microcontrollers to allow the CPU to communicate bit-serially with external devices. Using a bit serial format instead of bit-parallel format requires fewer I/O pins to perform the communication function, which makes it less expensive, but slower. Serial transmissions are performed either synchronously or asynchronously.。
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the Real-Time Clock Based on AT89S51Author: Class: ; Name:Abstract: Digital clock has become indispensable in people's daily life, it is widely used in public places such as the family and the office, and it gives people great convenience in study, work and entertainment. Due to the development of digital integrated circuit technology and the advanced quartz technology, the digital clock has advantages of accurate, stable performance and easy to carry. It is also used in automatic control, automatic signal and etc. Although the digital clocks are already sold on the market, but the single chip microcomputer timer function also can complete the design of the digital clock circuit. So it is necessary to the design of the digital clock. By single chip microcomputer internal timer timing precision, the four digital tube display year, month, day, time, minutes and seconds. With the keyboard, users can be preset time, display the time, set the content, set time operation mode, etc.Keywords: AT89S51; clock; digital tube; keyboard switch; function Introduction: AT89S51 is a very suitable for the beginners of the single chip microcomputer, it is fully compatible with the traditional instruction system of 8051,8031.Can realize the following functions:1. Use the keyboard switch, show respectively the seconds, minutes, hour, day, month, year;2. Use the keyboard preset year, month, day, time, minutes and seconds;3. Can the countdown, the countdown units for minutes;4. Every second , the four decimal point shine once;5. Timing alarm clock function, a buzzer call reminder.6. The clock error daily is not more than 1 second.Methods:1.The minimum single chip microcomputer systemAT89S51 has the following standard functions: 8 k bytes Flash, 256 bytes RAM, and 32-bit I/O lines, a watchdog timer, two data pointer, three 16 timer/counter, a level 6 vector 2 interrupt structure, full duplex serial port, piece of crystals and the clock circuit . In idle mode, the CPU stops working, allows RAM, timer/counter, serial port and interrupt continue to work. In fall protection mode, RAM content are stored, has been frozen, single chip microcomputer stops all work, until the next interruption or hardware reset.2.The displayDisplay uses the method of dynamic LED digital tube to display, P0 port output characters code to display, position codes are controlled by P2.4 ~ P2.7. The cost of the dynamic display is very low, but the dynamic display occupies more resources of the CPU interface. The design uses 12 lines. In addition by the dynamic display refreshing, which takes part of the work time of the CPU. So for some higher demand control system, we should consider the time taken by the display.3.The keyboardKeyboard uses 4 * 4 matrix keyboard, by P2.0 ~ P2.3 for row line, P1.4 ~ P1.7 for column line, phalanxes of 4 * 4 are made, and using the method of scanning software can determine the key value of each key. In the design, each key can be used to input data and commands.4.The power supplyControl power supply can be provided by DC 12V voltage, the power supply can be used by stepping motor driver, at the same time through the three linear stabilizer 7805 to provide other circuit power supply; If you don't need to use stepper motor, the control system of the DC5V power supply can be collected from ordinary USB interface of the computer, as long as the USB connects a computer USB port, the other connects two core power interface of controller.5.Programming interfaceMicroprocessor uses AT89S51. AT89S51 has ISP online programming function, and P1.5 ~ P1.7 are for the programming interface and software compilation and debugging includes two processes:1. By using keil software programming, input source program, and then compile until no grammar mistakes, using compilation command hex into system files(suffix:hex).2. After connecting the power cord and programming line, start USBASP programming software. Select the chip microprocessors model in the selection of AT89S51. Open and load in the flash. Load in the hex into system files. Use erase commands to erase chip in the original program, with programming command to write new programs in AT89S51. After finished, reset the program running, observing the consequence. If there is any error, it is needed to re-open the Medwin and modify the source program, to create the hex file, and then repeat the above operation, to meet the design requirements.Results:Key:| 1 | 2 | 3 | 分秒|| 4 | 5 | 6 | 时分|| 7 | 8 | 9 | 月日|| 确定| 0 | 倒计时| 年|#include <reg51.h>#include<stdio.h>#define uchar unsigned charsbit P1_3=P1^3;sbit P3_2=P3^2;unsigned char t=0;unsigned char t1=50;unsigned char t2=59;unsigned char t3=23;unsigned char t4=7;unsigned char t5=60;unsigned char t6=60;unsigned char k1=4;uchar i;uchar c;uchar a[10]={0x81,0xED,0x43,0x49,0x2D,0x19,0x11,0xCD,0x01,0x09};uchar p[5];void delay(int MS){int i,j;for( i=0;i<MS;i++)for(j=0;j<1141;j++);}uchar encoder(uchar num) {uchar i;switch(num){case 0x11:i=0x11;break;case 0x12:i=0x12;break;case 0x14:i=0x13;break;case 0x18:i=0x14;break;case 0x21:i=0x15;break;case 0x22:i=0x09;break;case 0x24:i=0x06;break;case 0x28:i=0x03;break;case 0x41:i=0x00;break;case 0x42:i=0x08;break;case 0x44:i=0x05;break;case 0x48:i=0x02;break;case 0x81:i=0x16;break;case 0x82:i=0x07;break;case 0x84:i=0x04;break;case 0x88:i=0x01;break;}return(i);}uchar key_value(){uchar tem,s,t,n;P1&=0x0f;P2|=0x0f;;tem=P2;tem|=0xf0;s=~tem;P2&=0xf0;P1|=0xf0;;tem=P1;tem|=0x0f;t=~tem;s=s+t;n=encoder(s);return(n);}uchar key(void){uchar i;P2|=0x0f;P1&=0x0f;;i=P2;i|=0xf0;i=~i;return(i);}void show1(uchar i,uchar j){P0=a[j];P2=P2&0x0f;P2|=1<<(i+3);}void show(uchar i,uchar j,uchar k,uchar l){uchar a[10]={0x81,0xED,0x43,0x49,0x2D,0x19,0x11,0xCD,0x01,0x09};uchar b,c,d,e;b=a[i];c=a[j];d=a[k];e=a[l];P2&=0x0f;P2=0x1f;P0=b;delay(1);P2&=0x0f;P2=0x2f;P0=c;delay(1);P2=0x4f;P0=d;delay(1);P2=0x8f;P0=e;delay(1);}void year(void){while(key()==0){show1(4,2);delay(1);show1(3,0);delay(1);show1(2,1);delay(1);show1(1,3);delay(1);}}void monthday(void) {TMOD=0X01;TH0=0x4c;TR0=1;IE=0X82;TMOD=0x01;while(key()==0){show1(4,0);delay(1);show1(3,1);delay(1);show1(2,0);delay(1);show1(1,t4%10);delay(1);}}void hourminute(void) {TMOD=0X01;TH0=0x4c;TL0=0x00;TR0=1;IE=0X82;TMOD=0x01;while(key()==0){show1(4,t3/10);delay(1);show1(3,t3%10);delay(1);show1(2,t2/10);delay(1);show1(1,t2%10);delay(1);}}void minutesecond() {TMOD=0X01;TH0=0x4c;TL0=0x00;TR0=1;IE=0X82;while(key()==0){show1(4,t2/10);delay(1);show1(3,t2%10);delay(1);show1(2,t1/10);delay(1);show1(1,t1%10);delay(1);}}void jishi(void){TMOD=0X01;TH0=0x4c;TL0=0x00;TR0=1;IE=0X82;TMOD=0x01;while(key()==0){show1(2,t5/10);delay(1);show1(1,t5%10);delay(1);}}void shuru(void) {--k1;if(k1==0)k1=4; while(key()==0){p[k1]=c;show1(4,c);delay(1);}}void sure(void){while(key()==0){show(p[1],p[2],p[3],p[4]);delay(1);}}void timer0(void) interrupt 1 {t++;if(t==20){t=0;t1++;t5--;if(t5==0){while(key()==0){show1(2,0);delay(1);show1(1,0);delay(1);P3_2=~P3_2;delay(1);P1_3=~P1_3;delay(1);}}t6--;if(t6==0){}if(t1==60){t1=0;t2++;if(t2==60){t2=0;t3++;if(t3==24){t3=1;t4++;if(t4==30)t4==1;}}}}TH0=0x4c;TL0=0x00;}void main(){while(1){i=key();while(i!=0){if(i==key()){uchar k;k=key_value();c=k;if(c==0x11)year();elseif(c==0x12)monthday();elseif(c==0x13)hourminute();elseif(c==0x14)minutesecond();elseif(c==0x15)jishi();elseif(c==0x16)sure();elseif(c==0x00||0x01||0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x09) shuru();else;}elsebreak;}}}Conclusion: Through the single chip microcomputer can accurately realize the accurate per time, can realize the countdown, display determined year, month, day, hour, minutes, seconds, and some other functions.Reference:[1]郭晓林.基于单片机的电子时钟设计[J].中国科技博览，2010，（9).[2]何立民.单片机应用技术选编（11）［M］．北京航天航空大学出版社，2006．[3]刘守义.单片机应用技术［M］．西安电子科技大学出版社，2009.[4]时钟芯片DS1302中文资料，/info/commonIC/0083003.html。