VHDL自动售邮票机的代码

自动售邮票机代码：
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity xrg4 is
port(clk,clk1:in bit;
coin1,coin5,coin10:in std_logic; --投入1、5、10角硬币
reset,reset1:in std_logic; --清零信号,1有效
six,eight:in std_logic; --6，8角的邮票
light:out std_logic; --购买成功指示灯
retlight:out std_logic_vector(3 downto 0) );--找回的硬币
end entity xrg4;
architecture xxrr of xrg4 is
type state is (s0,s1,s2);--状态机
signal n_state:state;--次态
signal c_state:state;--现态
signal touru:std_logic_vector(3 downto 0); --投入硬币面值
signal tincoint:std_logic_vector(4 downto 0);--计算出硬币总值（进程中）signal stamp:std_logic_vector(3 downto 0); --邮票面值
signal ret:std_logic_vector(3 downto 0); --找零值
signal zong:std_logic_vector(4 downto 0); --状态机硬币总值
begin
p1:process(clk1) --次态给现态
begin
if reset1='1'then c_state<=s2;
elsif clk1'event and clk1='1'then
c_state<=n_state;
end if;
end process p1;
p2:process(clk) --投入钱并计算总值
begin
if reset1='1'then tincoint<="00000";
elsif clk'event and clk='1' then
if coin1='1'then touru<="0001";
elsif coin5='1'then touru<="0101";
elsif coin10='1'then touru<="1010";
elsif coin1='0' and coin5='0' and coin10='0' then touru<="0000";
end if;
tincoint<=touru+tincoint;
end if;
end process p2;
p3:process(c_state) --进行购买，找零，退钱
begin
zong<=tincoint;
case c_state is
when s0=> if six='1' then stamp<="0110";n_state<=s1; --选通6角或8角邮票elsif eight='1' then stamp<="1000"; n_state<=s1;
else zong<="00000";ret<="0000";light<='0';n_state<=s0;
end if;
when s1=> if zong<stamp then
if reset='1' then ret<=zong(3 downto 0); n_state<=s2;
end if;
elsif zong>=stamp then light<='1';ret<=(zong-stamp);
end if;
when s2=> if six='1'or eight='1'then
ret<=zong(3 downto 0);light<='0';zong<="00000";
n_state<=s0;
end if;
end case;
end process p3;
p4:process(ret) --找钱，退钱的相应指示灯
begin
case ret is
when "0000" => retlight<="0000"; when "0001" => retlight<="0001";
when "0010" => retlight<="0010"; when "0011" => retlight<="0011"; when "0100" => retlight<="0100"; when "0101" => retlight<="0101"; when "0110" => retlight<="0110"; when "0111" => retlight<="0111"; when "1000" => retlight<="1000"; when "1001" => retlight<="1001"; when others => null;
end case;
end process p4;
end xxrr;
波形图：。