位置比较脉冲调制输出

位置比较脉冲调制输出在Turbo PMAC 系统中PMAC2型伺服IC 有自动脉冲宽度调制（PWM ）和脉冲频率调制（PFM ）两种电路。

有些情况下，这些也不能提供所需要的频率和/或脉冲宽度范围。

然而，对于一个备用的编码器通道，它可能使用位置比较输出的自动增加功能得到一个灵活的脉冲宽度或脉冲频率调制信号。

这个技术使用通道内部的PFM 电路，以固定比率增加通道编码器的计数。

然后，通过调整A 和B 比较寄存器之间的距离，我们可以控制脉冲宽度，通过调整自动增加的值，我们可以控制脉冲频率。

分析计数器频率是时钟频率的一个简单函数，这个时钟频率就是PFM 电路的时钟频率（PFMCLK ）并且这个指令值在PFM 寄存器里。

默认的9.8304 MHz PFMCLK 频率几乎适合大多数应用。

等式需要16位的PFM 指令值（使用24位字的高16位，与标准的M-变量定义一样）得到一个指定的计数器频率是：PFMCLKcounter PFM f f C *216= 如果希望写整个的24位PFM 指令寄存器，比如在MACRO 站点，仅将以上等式中的216用224替代。

比较电路的输出频率是计数器频率和比较电路自动增加位置值的函数。

根据给定的输出频率得到需要的自动增加值的等式是：outputcounter comp f f P =∆ 比较输出的占空比是A 和B 比较寄存器之间的距离和自动增加值的比例。

根据给定的占空比（表示成百分比）和自动增加值得到这个距离的等式是：100%DutyCycle P AB comp comp ∆=∆ 注意的是当写A 和B 比较寄存器时，它们必须是在当前计数值的两侧；否则自动增加功能将不能正确工作。

简单设置和编程以下的设置和程序部分可以用于实现这个功能。

在这个示例中，我们设置一个计数器频率是500kHz ，它给我们一个占空比1%的分辨率或比较好的5kHz 的脉冲频率。

注意的是实现一个特定脉冲配置的指令可以在一个运动程序或一个PLC 程序里执行；它们甚至可以作为在线指令发送。

通常它们将被嵌入到一个运动子程序的传递参数。

; 设置和定义I7203=2258 ; IC2的默认时钟频率I7204=2 ; IC2的PFM脉冲宽度I7210=8 ; IC2通道1内部仿真I7216=3 ; IC2通道1的AB为DAC输出C为PFM输出#define ServoCycCtr M100 ; 每个伺服周期的增量ServoCycCtr->X:$0,0,24,S#define SIC2Ch1EncPos M101 ; 当前计数器值SIC2Ch1EncPos->X:$078201,0,24,S#define SIC2Ch1OutC M107 ; C寄存器PFM输出SIC2Ch1OutC->Y:$078204,8,16,S ; 定义寄存器高16位#define SIC2Ch1CompPosA M108 ; 比较A寄存器SIC2Ch1CompPosA->Y:$078207,0,24,S#define SIC2Ch1CompPosB M109 ; 比较B寄存器SIC2Ch1CompPosB->X:$078207,0,24,S#define SIC2Ch1CompIncr M110 ; 比较自动增加SIC2Ch1CompIncr->X:$078206,0,24,S#define SIC2Ch1CompInitSta M111 ; 比较初始状态SIC2Ch1CompInitSta->Y:$078205,11#define SIC2Ch1CompInitEna M112 ; 比较初始化使能SIC2Ch1CompInitEna->Y:$078205,12#define Now P106 ; 当前伺服计数器#define CounterFreq P107 ; 计数频率为Hz#define PulseFreq P108 ; 输出频率为Hz#define DutyCycle P109 ; %接通时间(0 – 100)CounterFreq=500000 ; 计数频率，常数; 用指令来实现特定的频率和占空比，这些可以在运动程序，PLC程序，或作为一个在; 线指令（包括WHILE/ENDWHILE，不能以任何方式作为在线指令使用）SIC2Ch1OutC=0 ; 冻结计数器用于设置Now=ServoCycCtr ; 记录当前时间WHILE (ServoCycCtr=Now) ; 为冻结提供延时ENDWHILESIC2Ch1CompInitSta=0 ; 设置输出关闭SIC2Ch1CompInitEna=1 ; 强制初始的输出状态SIC2Ch1CompIncr=InternalFreq/PulseFreq ; 设置输出频率SIC2Ch1CompPosA=SIC2Ch1EncPos+SIC2Ch1CompIncr*(100-DutyCycle)/200 SIC2Ch1CompPosB=SIC2Ch1EncPos-SIC2Ch1CompIncr*(100-DutyCycle)/200 SIC2Ch1OutC=CounterFreq*65536/98304000 ; 输出频率的PFM值选通输出通过设置通道n的I7mn1等于1，同一块IC上的其余的编码器比较电路可以设置为只作用于IC上的第一个编码器。

如果任何的这些电路被分配到第一个通道的编码器，第一个通道的比较输出是所有被分配给它的比较电路的逻辑或（如果任何一个电路是“1”状态，输出就是1）。

这个可以用于选通第一个比较输出。

在这一节，我们使用第二个比较输出的“内部状态”写功能控制第一个比较输出是否一直打开，或输出一个频率。

; 额外设置和定义I7221=1 ; IC2通道2的比较使用编码器1#define SIC2Ch2CompInitSta M211 ; 比较的初始状态SIC2Ch2CompInitSta->Y:$07820D,11#define SIC2Ch2CompInitEna M212 ; 比较初始化使能SIC2Ch2CompInitEna->Y:$07820D,12; 命令输出一直打开SIC2Ch2CompInitSta=1SIC2Ch2CompInitEna=1; 命令第一个比较电路驱动输出SIC2Ch2CompInitSta=0SIC2Ch2CompInitEna=1Position-Compare Pulse-Modulated OutputThe PMAC2-style Servo ICs in Turbo PMAC systems have both automatic pulse-width-modulation (PWM) and pulse-frequency modulation (PFM) circuits. There are some cases in which neither of these can provide the required range of frequencies and/or pulse widths.However, with a spare encoder channel, it is possible to use the position-compare output with its “auto-increment” feature to get a very flexible pulse-width or pulse-frequency modulated signal. This technique uses the channel’s PFM circuit internally to increment the channel’s encoder counter at a fixed rate. Then, by adjusting the distance between the “A” and “B” compare registers, we can control the pulse width, and by adjusting the “auto-increment” value, we can control the pulse frequency.AnalysisThe counter frequency is simply a function of the clock frequency for the PFM circuit’s clock frequency (“PFMCLK”) and the command value in the PFM register. The default PFMCLK frequency of 9.8304 MHz is almost always suitable. The equation for the required 16-bit PFM command value (using the high 16 bits of the 24-bit word, as with the standard M-variable definition) to get a specified counter frequency is:PFMCLKcounter PFM f f C *216= If you want to write to the entire 24-bit PFM command register, as in the MACRO Station, just substitute 224 for 216 in the above equation.The output frequency from the compare circuit is a function of the counter frequency and the compare circuit’s auto-increment position value. The equation for the required auto-increment value to obtain a given output frequency is:outputcounter comp f f P =∆ The duty cycle of the compare output is the ratio of the distance between the “A” and “B”compare registers and the auto-increment value. The equation for this distance for a given duty cycle (expressed as a percent) and auto-increment value is:100%DutyCycle P AB comp comp ∆=∆ Note that when writing to the “A” and “B” compare registers, they must be on opposite sides of the present counter value; otherwise the auto-increment feature will not work properly.Sample Setup and ProgramThe following setup and program section can be used to implement this functionality. In this example, we set up a counter frequency of 500 kHz, which gives us a duty cycle resolution of 1% or better at pulse frequencies up to 5 kHz.Note that the commands that implement a particular pulse configuration can be implemented in either a motion program or a PLC program; they could even be sent as on-line commands. Commonly they would be embedded in a motion program subroutine with passed arguments.; Setup and definitionsI7203=2258 ; IC2 default clock frequencies I7204=2 ; IC2 PFM pulse widthI7210=8 ; IC2 Ch1 internal pulse decode I7216=3 ; IC2 Ch1 AB DAC C PFM output#define ServoCycCtr M100 ; Increments each servo cycle ServoCycCtr->X:$0,0,24,S#define SIC2Ch1EncPos M101 ; Present counter valueSIC2Ch1EncPos->X:$078201,0,24,S#define SIC2Ch1OutC M107 ; C PFM output registerSIC2Ch1OutC->Y:$078204,8,16,S ; Define as high 16 bits#define SIC2Ch1CompPosA M108 ; Compare A registerSIC2Ch1CompPosA->Y:$078207,0,24,S#define SIC2Ch1CompPosB M109 ; Compare B registerSIC2Ch1CompPosB->X:$078207,0,24,S#define SIC2Ch1CompIncr M110 ; Compare auto-incrementSIC2Ch1CompIncr->X:$078206,0,24,S#define SIC2Ch1CompInitSta M111 ; Compare initial stateSIC2Ch1CompInitSta->Y:$078205,11#define SIC2Ch1CompInitEna M112 ; Compare initialize enableSIC2Ch1CompInitEna->Y:$078205,12#define Now P106 ; Present servo counter#define CounterFreq P107 ; Counter freq in Hz#define PulseFreq P108 ; Output freq in Hz#define DutyCycle P109 ; % on-time (0 – 100)CounterFreq=500000 ; Counter freq, constant for app ; Commands to implement particular frequency and duty cycle; These could be in motion program, PLC program, or as on-line; commands (except for the WHILE/ENDWHILE, which would not be; needed anyway in on-line commands)SIC2Ch1OutC=0 ; Freeze counter for setupNow=ServoCycCtr ; Log present timeWHILE (ServoCycCtr=Now) ; Provide delay for freeze ENDWHILESIC2Ch1CompInitSta=0 ; Set for output offSIC2Ch1CompInitEna=1 ; Force initial output stateSIC2Ch1CompIncr=InternalFreq/PulseFreq ; Set for out freqSIC2Ch1CompPosA=SIC2Ch1EncPos+SIC2Ch1CompIncr*(100-DutyCycle)/200 SIC2Ch1CompPosB=SIC2Ch1EncPos-SIC2Ch1CompIncr*(100-DutyCycle)/200 SIC2Ch1OutC=CounterFreq*65536/98304000 ; PFM value for freqGating the OutputThe compare circuits for subsequent encoders on the same IC can be set up to act on the first encoder on the IC by setting I7mn1 for Channel n to 1. If any of these circuits is assigned to the first channel’s encoder, the first channel’s compare output is the logical OR of all of the compare circuits assigned to it (if any of the circuits are in a “1” state, the output is 1). This can be used to “gate” the first compare output. In this section, we use the “initial-state” write feature of the second compare output to control whether the first compare output is always on, or outputting a frequency.; Additional setup and definitionsI7221=1 ; IC2 Ch2 compare use Enc1#define SIC2Ch2CompInitSta M211 ; Compare initial stateSIC2Ch2CompInitSta->Y:$07820D,11#define SIC2Ch2CompInitEna M212 ; Compare initialize enableSIC2Ch2CompInitEna->Y:$07820D,12; Commands to force output always onSIC2Ch2CompInitSta=1SIC2Ch2CompInitEna=1; Commands to let first compare circuit drive outputSIC2Ch2CompInitSta=0SIC2Ch2CompInitEna=1。