单片机英文资料+英文文献
单片机英文资料+英文文献
Dormancy of the one-chip computer---restore to the throne in the operation way and improve anti- interference ability
Introduce a kind of dormancy of using- restore to the throne
in theoperation way and improve the anti-interference ability method
of
the one-chip computer;Analyse its scope of application, provide and
use
the circuit concretly; Combine the instance, analyse the
characteristic
of the hardware and software design under these kind of operation way.
Keyword: One-chip computer Restore to the throne /dormancy anti-interference Foreword
With the development at full speed of the microelectric technique,
the performance of the one-chip computer improves rapidly, demonstrate the outstanding advantage in the operation, logic control,
intelligent
respect, replaced and enlarged the measuring that the circuit made
up,
control circuit by digital logical circuit, operation originally to
a
great extent, use very extensivly. But because it have system halted,
procedure run critical defect of flying etc, make it limit in a lot of
important application of occasion. A lot of technology in
anti-interference , for example set up the software trap, add thehardware
to guard the gate in dog's circuit etc, can make this problem havebetter
settlement, but still the existing problem: ? Guard the gate dog at the
movement, mean and appear mistake already and run some time, this is not
allowed in some occasions; ?Procedure appear circulation mistake very
much sometimes, but just guard the gate dog control link include and enter,
adopt and guard the gate as to such a mistake dog unable to discern; ?
In measure and control cycle among the long system, one-chip computer
spend wait for the peripheral hardware a large amount of time, will be
interfered too when carry out and wait for the order. To these situations,
we have tried the method restored to the throne voluntarily in practice,
alternate pulse of adopting etc or restore to the throne waking according
to external terms to the one-chip computer up. After being restored to
the throne each time, the one-chip computer carries out the corresponding
procedure, enters dormancy in time after finishing carrying out the task,
wait to be restored to the throne nextly. Have solved above-mentioned
problems well with this method , and has got better result in the agricultural voltage transformer comprehensive protector experiment. Now
take 51 serial one-chip computers as an example and probe into the concrete
principle and implementation method, restored to the throne the signal
as the high level.
1.A principle and implementation method
1.1 Restored to the throne the law regularly unconditionally
Use timer, special-purpose clock chip or other pulse generator, produce signal of restoring to the throne regularly according to
interval that set for. This kind of method is especially suitable for
the measuring instrument. In not running actually, sample the analog quantity of
introduction with A/D converter often, then store showing. This
course
is very fast, but steady for reading, the data per second are only upgraded 1 -2 times, a large amount of time of CPU is used for waiting. Let CPU
carry out and enter dormancy directly after the task , restore to
the
throne and wake by external world up It carry out the next operation, this is to restore to the throne the law regularly In this way can make anti-interference ability strengthen greatly , have 2 points
mainly: ?.
At the dormancy, procedure stop run, can appear PC indicator
disorderly
procedure that causes run and fly. Work time in dormancy proportion 1:9, that is to say 1 s have 0.1 time of s used for measuring, sending
off showing, there is time dormancy of 0.9s, the probability that the procedure is
interfered is 1/10 while running at full speed, whole anti-interference
ability raise by 10 times. ? Because every 1s is restored to the throne
once unconditionally, once present the system halted during a job, can
certainly resume when restored to the throne next time. As to only instrument that show, some reading mistake that 1s appear accidentally
there is no memory to the next measurement, be could bear , belong to
“pass” mistake. This kind is restored to the throne the advantage of
dog's circuit for guarding the gate regularly, first, change waiting time into a dormancy state, time to shorten and may be interfered; Second,
avoided happenning that the dog controls the death circulation of the link to include guarding the gate.
1.2 The external condition is restored to the throne the law
Some arrival that export or measure is controlled by the outside. For
instance, the hot form. of heating, rotate the pulse produced and calculate heat by hot water water wheels, there is no hot water to flow, there is no heat to export, CPU only need in fact keep number value, do
not need to count. Can imagine hot water water wheels rotate when parking warm , CPU idle in will it be will it be one season autumn
spring and summer, If let dormancy its , measure have water wheels pulse constantly,
anti-interference ability can strengthen greatly. So, so long as
link up the restoring to the throne of the pulse of the water wheels and CPU, the water wheels rotate a circle each time, CPU is restored to the throne once, hot form. can work normally , this is restored to the throne the law by
the external condition . Similar application have half electron
kilowatt-hour meter , go on one count just when the machinery degree wheels and transfers to a circle, users do not need the electricity, CPU has been
knowing the dormancy all the time . The restoring to the throne in the
interval not to be regular, but confirmed according to the external condition of this method. In some occasions, the time of the dormancy will
be very long, very effective to improving anti-interference ability.
2 .The hardware realizes the main point
2.1 Restored to the throne regularly unconditionally
Generally have 2 kinds of methods. ? Use theitimer or the
special-purpose clock chip to be restored to the throne. Fig1, in order
to use the timing circuit that 555 circuit makes up; Can use the clock
chips of X1126 ,etc too , wake CPU up with the alarm signal after setting
up warning time. This kind of method is suitable when the long interval
is made, can also follow the result of this operation ，determine to wake
time up in alarm next time temporarily, very flexible and convenient. ?
The signal of using the system to be inherent is as reducing the pulse
regularly. Use 50Hz worker power make reducing after having a
facelift
frequently, already omit the timer, gathered the corresponding
signal for
the phase place which measured the electric current signal at the same
time, as Fig. 2 shows.
2.2 External conditions are restored to the throne
Send external condition pulse to and is restored to the throne the end son after having a facelift. To that above-mentioned water wheels or
the ammeter spend a pulse produced, can use Schmitt's trigger to have a
facelift; For writing down the instrument of the biggest or
minimum，
can use the window comparator. In order to realize the
electronization
that is regulated，can use the electronic electric potential device, establish upper and lower limits with the order of the one-chip computer.
2.3 Reduce cycle and restored to the throne the high electricity at
ordinary times
In Fig3, restored to the throne the signal during high level Tr, the one-chip computer is in the state of restoring to the throne, the procedure does not run, anti-interference ability is the strongest;
After the high level, the one-chip computer begins to hold the conduct procedure. That is to say, are restored to the throne and suitable for
the time that the procedure carries out during the low level Td of the signal, this time should be greater than the execution cycle of the procedure each time. It is restore to the throne cycle and restore to
the throne high level of signal take empty than very much important to choose rationally. As to simple to show instrument, restore to the
throne cycle determine data break cycle, low electricity is it measure, hancl over all time shown to greater than to want at ordinary times; Otherwise, cant present forever the mistake of the intact executive program.Monolithic integrated circuit in Ts and Tr period all can effectively the antijamming, but is best the unnecessary time
arrangement in Tr. When the program time is long, when as far as
possible the request reduces Tr, may join the differentiating circuit, like chart 1 center C30, R26, D9.
2.4 Treatment of output end sons
(1) Restore to the throne straight pulse
During all I/O mouth of one-chip computer turn into the high level when restoring to the throne. That is to say output for low pin normally, will according to restore to the throne cycle appear the width for the straight pulse of Tr. This straight pulse will influence the normal output, 2 methods are dealt with: ? Connect in parallel electric capacity
suppress , capacity confirm according to Tr time that restore to the throne on the son in end. Reducing Tr can be reduced and connected the electric capacity in parallel. ? It is invalid to design the peripheral circuit
into the high level. (2) Fault-tolerant
Choose the capacity that the output end connects the electric capacity
in parallel fault-tolerantly and properly, can realize fault-
tolerant control. Reduced cycle in a certain, because interfered exporting the wrong level. Because the keeping function of electric capacity, can't still enable exporting the change to the valid level within this cycle; Next cycle , the mistake is corrected. So, so long as does not make mistakes in 2 cycles in succession, it is very fault-tolerant to export Certainly, this kind of method will make the normal
output change lag behind for one cycle, just really reflect the output end son.
2.5 has the electricity to measure and restore to the throne manually
Some system is it make some initialize and operate to want at electricity for the first time. Restored to the throne and already become
the beginning condition of normal running each time while adopting the
way of restoring to the throne to run , it is unable to distinguish and
have the electricity for the first time. In some pin connects the electric
capacity of one ljIF to the ground, measure this pin after being restored
to the throne, if low level to have electricity for the first time. Give
system set up one restore to the throne button, that is to say a common
one manual to restore to the throne, this button is not joined and being
restored to the throne in the end, is connected in parallel in the electric
capacity both ends to the ground of above-mentioned pins.
3. The software realizes the main point
3.1 is it resume with zero clearing RAM to output
Restore to the throne the last all pin turn high level into , is it should taKe place unnecessary change for low pin to make regularly, so, should resume the state.of all pins immediately after being restored to
the throne. There are 2 kinds of methods : ? Analyse and judge
immediately after being restored to the throne this time, provide
the
state of the pin according to the need; ? In being RAM it is the
last
last state that come down,these RAMs when restored.To the throne regularly
can the zero clearing one; But electricity or manual to rstore to
the
throne when pushing in conformity with zero clearing, is it embody
to want
when the software is worked outing at the beginning. If calculate time
allows, try one's best to take method 1. Restore to the throne cycle probability made mistakes to calculate very little, according to 2
for
the 2nd time in succession. 4 output end son that narrate connect treatment
method of electric capacity in parallel, can reach kind anti-interference
result very.
3.2 realizes crossing over and is restored to the throne alternate time sequence
regularly to control
Work in way of restoring to the throne now, start anew and carry out the same procedure repeatedly each time. Can be divided into 2 kinds of situations: ? As to simple to show instrument, carry on
measurement ，
send off showing after being restored to the throne each time, have causality between restoring to the throne twice . need is it switch over
to the dormancy to waiting original only. Should pay attention to, measurement, give total time used to show is it is it restore to the throne low electricity at ordinary times to smaller than to want, otherwise can't present forever the mistake of the intact executive program. ? For
having application that time sequence controlled , after being restored to the throne each time , should check first that see the sign left last cycle , in order to determine what is done this cycle . That
is to say every is it restore to the throne operation of cycle to
stride , by is it transmit to indicate all, these indicate while leaving in inside RAM , the zero clearing only when have the electricity for the
first time. For example, the protecting synthetically device of above-mentioned voltage transformer , is restored to the throne regularly according to the interval of 20ms. It reaches the normal working state through, certain movement order after having the electricity, such as Fig. 4; Write a part of the procedure of the software according to this movement, such as Fig. 5.
In 4 Fig, act as person who protect the beginning at the electricity, is it transmit power 0 to try at first. 5s, points out and transmits power soon; Transmit power formally after waiting for 30s. It is start-
up time in 1s after transmitting power, does not measure the electric current. Start after finishing, if all going well, the location is put" normal sign ", person who protect restore to the throne cycle enter
normal running in the next one. Try 0 that transmits power. 5s is it is
it realize to count once restoring to the throne to delay time, restore
to the throne time 20ms each time. At having electricity for the first time, make all zero clearing to inside RAM, make it is it time Ts to transmit power not to try =Dormancy after 25. After restoring to the throne, is it have electric pin to have electricity for the first time already, is it is it is it is it time the measuring of Ts to transmit power to try to get to go on to measure next time. If Ts * 0, is it in
is it prolong period to transmit power, is it enter dormancy after the 1 to reduce Ts to prove. Act as Ts-1 = 0, the course which waited for 30s that should enter and lose electrical power. Just when Ts decreases progressively to 0, make it is it indicate to wait for not to lose
electrical power Td =1500. When the procedure is restored to the throne beginning again, measure to Ts =0 but Td * 0, is it is it is it transmit power to try to cross already to indicate, at is it wait for the course of 30s to lose electrical power now. In this way, the whole process is transmitted each other by such these parameters as Tr, Td , Ts etc, go on step by step.
Result:
Conclusion Anti-interference is an important problem in an
electronic
design, especially Important in the one-chip computer. This is because the one-chip computer has procedures to run particularity that flies, the consequence that it is interfered may be the system halted, may send out various kinds of mistakes or illegal movements before the system halted too, make the whole system produce the mortality mistake. So, only guarantee it is not enough yet for one-chip computer not to crash, study how to reduce the risk interfered, it can befault-toierant how is it after and make mistakes. This text is it act as some exploration from two these to try hard, hope these elementary opinions can play some function of casting a brick to attract jade, helpful to everybody; Hope too every colleague explore together, improve our design level together.
单片机-英文参考文献
Structure and function of the MCS-51series Structure and function of the MCS-51series one-chip computer MCS-51is a name of a piece of one-chip computer series which Intel Company produces.This company introduced8top-grade one-chip computers of MCS-51series in1980after introducing8one-chip computers of MCS-48series in1976.It belong to a lot of kinds this line of one-chip computer the chips have,such as8051,8031,8751, 80C51BH,80C31BH,etc.,their basic composition,basic performance and instruction system are all the same.8051daily representatives-51serial one-chip computers. An one-chip computer system is made up of several following parts:(1)One microprocessor of8(CPU).(2)At slice data memory RAM(128B/256B),it use not depositting not can reading/data that write,such as result not middle of operation, final result and data wanted to show,etc.(3)Procedure memory ROM/EPROM (4KB/8KB),is used to preserve the procedure,some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers,such as8031, 8032,80C,etc..(4)Four8run side by side I/O interface P0four P3,each mouth can use as introduction,may use as exporting too.(5)Two timer/counter,each timer/ counter may set up and count in the way,used to count to the external incident,can set up into a timing way too,and can according to count or result of timing realize the control of the computer.(6)Five cut off cutting off the control system of the source. (7)One all duplexing serial I/O mouth of UART(universal asynchronous receiver/transmitter(UART)),is it realize one-chip computer or one-chip computer and serial communication of computer to use for.(8)Stretch oscillator and clock produce circuit,quartz crystal finely tune electric capacity need outer.Allow oscillation frequency as12megahertas now at most.Every the above-mentioned part was joined through the inside data bus.Among them,CPU is a core of the one-chip computer,it is the control of the computer and command centre,made up of such parts as arithmetic unit and controller,etc..The arithmetic unit can carry on8persons of arithmetic operation and unit ALU of logic operation while including one,the1 storing device temporarilies of8,storing device2temporarily,8's accumulation
毕业设计外文翻译附原文
外文翻译 专业机械设计制造及其自动化学生姓名刘链柱 班级机制111 学号1110101102 指导教师葛友华
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步进电机及单片机英文文献及翻译
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毕业设计英文翻译
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单片机的外文文献及中文翻译
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at89c52单片机中英文资料对照外文翻译文献综述
at89c52单片机简介 中英文资料对照外文翻译文献综述 A T89C52 Single-chip microprocessor introduction Selection of Single-chip microprocessor 1. Development of Single-chip microprocessor The main component part of Single-chip microprocessor as a result of by such centralize to be living to obtain on the chip，In immediate future middle processor CPU。Storage RAM immediately﹑memoy read ROM﹑Interrupt system、Timer /'s counter along with I/O's rim electric circuit awaits the main microcomputer section，The lumping is living on the chip。Although the Single-chip microprocessor r is only a chip，Yet through makes up and the meritorous service be able to on sees，It had haveed the calculating machine system property，calling it for this reason act as Single-chip microprocessor r minisize calculating machine SCMS and abbreviate the Single-chip microprocessor。 1976Year the Inter corporation put out 8 MCS－48Set Single-chip microprocessor computer，After being living more than 20 years time in development that obtain continuously and wide-ranging application。1980Year that corporation put out high performance MCS －51Set Single-chip microprocessor。This type of Single-chip microprocessor meritorous service capacity、The addressing range wholly than early phase lift somewhat，Use also comparatively far more at the moment。1982Year that corporation put out the taller 16 Single-chip microprocessor MCS of performance once
MCS_51系列单片机中英文资料对照外文翻译文献综述
MCS-51系列单片机 中英文资料对照外文翻译文献综述 Structure and function of the MCS-51 series Structure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have, such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same.8051 daily representatives-51 serial one-chip computers. A one-chip computer system is made up of several following parts: (1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositing not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. (3) Procedure memory ROM/EPROM (4KB/8K B ), is used to preserve the
毕业设计_英语专业论文外文翻译
1. Introduction America is one of the countries that speak English. Because of the special North American culture, developing history and the social environment, American English has formed its certain unique forms and the meaning. Then it turned into American English that has the special features of the United States. American English which sometimes also called United English or U.S English is the form of the English language that used widely in the United States .As the rapid development of American economy, and its steady position and strong power in the world, American English has become more and more widely used. As in 2005, more than two-thirds of English native speakers use various forms of American English. The philologists of the United States had divided the English of the United States into four major types: “America n creating”; “Old words given the new meaning”; “Words that eliminated by English”;“The phonetic foreign phrases and the languages that are not from the English immigrates”[1]. Compared to the other languages, American English is much simple on word spelling, usage and grammar, and it is one of the reasons that American English is so popular in the world. The thesis analyzes the differences between American English and British English. With the main part, it deals with the development of American English, its peculiarities compared to that of British English, its causes and tendency. 2. Analyses the Differences As we English learners, when we learning English in our junior or senior school, we already came across some words that have different spellings, different pronunciations or different expressions, which can be represented by following contrasted words: spellings in "color" vs. "colour"; pronunciations in "sec-re-ta-ry" vs. "sec-re-try";
关于51单片机英文文献的英文翻译
利用单片机的定时器 6.1 前言 这一章包含一个描述的定时器系统微控制器，包括通用定时器，该定时器，和看门狗。 6.2 总体结构和功能，计时器系统 时间是必不可少的操作微控制器系统，可以生成信号的精确确定的期限，或外部事件计数。这原因，定时器子系统，是目前所有的微控制器的实现，和涵盖的范围广泛的功能包括： ?生成精确的时间间隔 ?测量时间的外部事件 ?计数外部事件。 多数微控制器提供专用定时器，或使用通用计时器实现以下功能： ?实时时钟 ?产生的脉冲宽度调制（脉宽调制）信号 ?看门狗检测程序失控情况。 虽然有很大的差异在不同的实现通用定时器在不同的微控制器，有许多相似在操作的原则和结构的定时器子系统。 图6.1显示了一个定时器系统总体框图，说明原则实施最单片机定时器。核心要素的定时器子系统是一个计数器，tcnt（8或16位在长度），这可能是读或写的软件（有时）。时钟tcnt 得到从系统时钟，除以一个可编程分频器，或外部时钟应用到一个单片机引脚。软件控制的计时器68使用6单片机定时器。
采用控制寄存器晶体管和信息方面的各种事件相关的计时器，可以读取状态寄存器tflg。几种工作模式是可能的计时器： 定时器溢出。在这种模式下，如果感兴趣的是当tcnt计数器达到它的最大数量和返回到零在下一个时钟脉冲。溢出信号这标志着这一事件是应用于中断控制逻辑（Ⅱ），这可能产生一个中断请求处理器。之间的时间间隔连续溢出控制通过修改输入时钟频率应用到tcnt，或以书面tcnt 一初始值的计算。 ?输入捕获。在这种经营模式，内容tcnt此刻的发生外部事件，定义边缘的一个输入信号，转移在捕获寄存器（民事），和一个中断请求可能会生成。由比较连续值捕获率，有可能确定之间的时间间隔的外部事件。 ?输出比较。在这种经营模式，内容tcnt不断比较了硬件的内容的光学字符识别（比较寄存器的输出）指数字比较器的比较。当一个寄存器的内容比赛中，一个中断请求可能会生成。或者，可以比较匹配通过编程改变现状的一个或多个输出线。 ?外部事件计数器。在这种经营模式，输入tcnt连接一个单片机输入线，和tcnt计数脉冲与外部事件。该软件是了解记录一些外部通过阅读tcnt事件。 6.3 特点鲜明的通用定时器HC 11 16位tcnt计数器HC 11可以依靠内部时钟，只有向上的。它可以读取软件，但不能被清除或书面。分频器是一个可编程的4位计数器，它将系统时钟的1，4，8，或16。有四个16位输出比较寄存器（光学字符识别），称为toc1，toc2，toc3，和toc4，三输入捕获寄存器（民事），称为tic1，tic2，和tic3，和一个额外的寄存器，可通过软件配置为五分之一 光学字符识别寄存器，笔名TOC五，或作为四分之一个输入捕获寄存器tic4。各种定时器功能相关的输入/输出线端口，如图所示在表6.1。 表6.1 替代功能的输入/输出线端口 1控制和状态寄存器的HC 11定时器虽然反tcnt，和分频器是独一无二的，在场的八民事/光学字符识别寄存器，各有不同的状态标志，相关的输入/输出线，随着可能产生不同的中断请求，
java毕业论文外文文献翻译
Advantages of Managed Code Microsoft intermediate language shares with Java byte code the idea that it is a low-level language witha simple syntax , which can be very quickly translated intonative machine code. Having this well-defined universal syntax for code has significant advantages. Platform independence First, it means that the same file containing byte code instructions can be placed on any platform; atruntime the final stage of compilation can then be easily accomplished so that the code will run on thatparticular platform. In other words, by compiling to IL we obtain platform independence for .NET, inmuch the same way as compiling to Java byte code gives Java platform independence. Performance improvement IL is actually a bit more ambitious than Java bytecode. IL is always Just-In-Time compiled (known as JIT), whereas Java byte code was ofteninterpreted. One of the disadvantages of Java was that, on execution, the process of translating from Javabyte code to native executable resulted in a loss of performance. Instead of compiling the entire application in one go (which could lead to a slow start-up time), the JITcompiler simply compiles each portion of code as it is called (just-in-time). When code has been compiled.once, the resultant native executable is stored until the application exits, so that it does not need to berecompiled the next time that portion of code is run. Microsoft argues that this process is more efficientthan compiling the entire application code at the start, because of the likelihood that large portions of anyapplication code will not actually be executed in any given run. Using the JIT compiler, such code willnever be compiled.
毕业设计外文翻译格式实例.
理工学院毕业设计(论文)外文资料翻译 专业：热能与动力工程 姓名：赵海潮 学号：09L0504133 外文出处：Applied Acoustics, 2010(71):701~707 附件： 1.外文资料翻译译文；2.外文原文。
附件1：外文资料翻译译文 基于一维CFD模型下汽车排气消声器的实验研究与预测Takeshi Yasuda, Chaoqun Wua, Noritoshi Nakagawa, Kazuteru Nagamura 摘要目前，利用实验和数值分析法对商用汽车消声器在宽开口喉部加速状态下的排气噪声进行了研究。在加热工况下发动机转速从1000转/分钟加速到6000转/分钟需要30秒。假定其排气消声器的瞬时声学特性符合一维计算流体力学模型。为了验证模拟仿真的结果，我们在符合日本工业标准（JIS D 1616）的消声室内测量了排气消声器的瞬态声学特性，结果发现在二阶发动机转速频率下仿真结果和实验结果非常吻合。但在发动机高阶转速下（从5000到6000转每分钟的四阶转速，从4200到6000转每分钟的六阶转速这样的高转速范围内），计算结果和实验结果出现了较大差异。根据结果分析，差异的产生是由于在模拟仿真中忽略了流动噪声的影响。为了满足市场需求，研究者在一维计算流体力学模型的基础上提出了一个具有可靠准确度的简化模型，相对标准化模型而言该模型能节省超过90％的执行时间。 关键字消声器排气噪声优化设计瞬态声学性能 1 引言 汽车排气消声器广泛用于减小汽车发动机及汽车其他主要部位产生的噪声。一般而言，消声器的设计应该满足以下两个条件：（1）能够衰减高频噪声，这是消声器的最基本要求。排气消声器应该有特定的消声频率范围，尤其是低频率范围，因为我们都知道大部分的噪声被限制在发动机的转动频率和它的前几阶范围内。（2）最小背压，背压代表施加在发动机排气消声器上额外的静压力。最小背压应该保持在最低限度内，因为大的背压会降低容积效率和提高耗油量。对消声器而言，这两个重要的设计要求往往是互相冲突的。对于给定的消声器，利用实验的方法，根据距离尾管500毫米且与尾管轴向成45°处声压等级相近的排气噪声来评估其噪声衰减性能，利用压力传感器可以很容易地检测背压。 近几十年来，在预测排气噪声方面广泛应用的方法有：传递矩阵法、有限元法、边界元法和计算流体力学法。其中最常用的方法是传递矩阵法（也叫四端网络法）。该方
51单片机外文文献
The Introduction of AT89C51 Description The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel ’highs-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. Function characteristic The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, one 5 vector two-level interrupt architecture, a full duplex serial port, one-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description VCC：Supply voltage. GND：Ground.