英文原文文献

A Nios II Based English Speech Training System For Hearing-impaired

Children

Ningfeng Huang School of Electronic Science and Engineering

Southeast University

Nanjing, China

ningfengh@

Haining Wu

School of Automation

Southeast University

Nanjing, China

wuhaining821@

Yinchen Song

School of Biological Science

and Medical Engineering

Southeast University

Nanjing, China

songyinchen@

Abstract

We propose a novel feature system of language training for hearing-impaired children’s speech rehabilitation based on DE1 development board, which contains an on-chip system called uc/os. The system is imbedded with Nios II processors, which could make our system stable, portable and cheap. Considering the limited storage and calculation ability of imbed system, at the same time, and we recognize child’s voice by Single phoneme, we use LPCC as Eigenvector to judge the similarity between speaker’s voice and example’s.

1. Introduction

Hearing-impaired children have difficulty in hearing, for which people may consider that they cannot speak a word and will become so-called “deaf and dumb” people. However, most of them actually meet the requirements for learning to speak. Firstly, most of the hearing-impaired children have healthy speech organs. What’s more, using hearing aids to amplify and modulate sounds, 95% hearing-impaired children can compensate for their poor sense of sound, as a result of which they can understand phonic language and learn to speak. Thirdly, sense of vision, feeling and motion contribute to learning phonic language[1].

To help hearing-impaired children learn to speak, many researchers have developed various speech training aids. Most of them are based on computer or MCU+DSP[2-5]. This paper describes a Nios II based English speech training system, which is designed for the hearing-impaired children. The system is developed on the Altera DE1 development board. DE1 board provides a lot of features to enable various multimedia project developments for users. Cyclone II FPGAs are perfectly suited as an embedded processor or microcontroller when combined with Altera's 32-bit Nios II embedded processor intellectual property (IP) cores. Users can add many other functions to the FPGA with additional IP cores available from Altera Corporation and Altera's partners. Compared with the computer or MCU+DSP based systems, system based on Nios II is much more compact, stable and cheaper.

Considering the hearing-impaired children have difficulty pronouncing and producing intelligible speech, we design this system with several speech training modules according to the feature of speech training system for hearing-impaired children and the connection between the acoustic character and physiological character of the speech, such as breathing training, vowel training and consonant training.

This paper is organized as follows. In Section 2, a brief introduction of the construction is presented. In Section3, we describe the main algorithm we use to recognize speech. In Section 4, we discuss about how we realize it using Altera DE1 Multimedia

2009 International Conference on Computer Engineering and Technology

This work was supported by the Altera University Program.