P-157 Z. Ge P-157 A Single Cell-gap Transflective VA LCD using Positive Liquid Crystal Mat

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二维电子气等离激元太赫兹波器件

二维电子气等离激元太赫兹波器件
，２，３秦㊀华１，黄永丹１，孙建东１，张志鹏１，余㊀耀１，李㊀想１，孙云飞４
１（中国科学院苏州纳米技术与纳米仿生研究所中国科学院纳米器件与应用重点实验室，江苏苏州２１５１２３；２中国科学院大学，北京１０００４９；３中国科学技术大学纳米技术与纳米仿生学院，江苏苏州２１５１２３；４苏州科技大学电子与信息工程学院，江苏苏州２１５００９）
Ａｂｓｔｒａｃｔ：Ｓｏｌｉｄｓｔａｔｅｔｅｒａｈｅｒｔｚｐｌａｓｍａｄｅｖｉｃｅｓａｒｅｂｅｃｏｍｉｎｇｏｎｅｏｆｔｈｅｉｍｐｏｒｔａｎｔｒｅｓｅａｒｃｈａｒｅａｓｉｎｗｈｉｃｈｂｏｔｈｓｏｌｉｄｓｔａｔｅｍｉｃｒｏｗａｖｅ／ｍｉｌｌｉｍｅｔｅｒｗａｖｅｅｌｅｃｔｒｏｎｉｃｓａｎｄｓｅｍｉｃｏｎｄｕｃｔｏｒｌａｓｅｒｔｅｃｈｎｏｌｏｇｉｅｓａｒｅｂｅｉｎｇｄｅｖｅｌｏｐｅｄａｎｄｍｅｒｇｅｄｔｏｗａｒｄｓｔｈｅｔｅｒａｈｅｒｔｚｆｒｅｑｕｅｎｃｙｒｅｇｉｍｅ．Ｉｎｔｈｉｓｒｅｖｉｅｗ，ｗｅｉｎｔｒｏｄｕｃｅｔｈｅｍａｎｉｐｕｌａｔｉｏｎ，ｅｘｃｉｔａｔｉｏｎ（２ＤＥＧ）ｐｌａｓｍｏｎｓｉｎＡｌＧａＮ／ＧａＮｈｅｔｅｒｏｓｔｒｕｃｔｕｒｅ，ａｎｄｒｅｐｏｒｔｔｈｅａｎｄｐｒｏｂｉｎｇｏｆｔｗｏｄｉｍｅｎｓｉｏｎａｌｅｌｅｃｔｒｏｎｇａｓ，ｍｏｄｕｌａｔｏｒｓａｎｄｅｍｉｔｔｅｒｓ．ｒｅｃｅｎｔｐｒｏｇｒｅｓｓｅｓｉｎｔｈｅｉｍｐｌｅｍｅｎｔａｔｉｏｎｏｆｐｌａｓｍｏｎｐｈｙｓｉｃｓｉｎｔｅｒａｈｅｒｔｚｄｅｔｅｃｔｏｒｓＴｈｅｃｏｕｐｌｉｎｇｂｅｔｗｅｅｎｔｈｅｐｌａｓｍｏｎｍｏｄｅｓａｎｄｔｈｅｔｅｒａｈｅｒｔｚｅｌｅｃｔｒｏｍａｇｎｅｔｉｃｗａｖｅｓｉｎｆｒｅｅｓｐａｃｅａｒｅｒｅａｌｉｚｅｄｂｙｕｓｉｎｇｇｒａｔｉｎｇｃｏｕｐｌｅｒ，ａｎｔｅｎｎａａｎｄｔｅｒａｈｅｒｔｚＦａｂｒｙＰ é ｒｏｔｃａｖｉｔｙｗｈｉｃｈｆｕｒｔｈｅｒｍｏｄｕｌａｔｅｓｔｈｅｔｅｒａｈｅｒｔｚｅｌｅｃｔｒｏｍａｇｎｅｔｉｃｍｏｄｅｓａｎｄｅｎｈａｎｃｅｓｔｈｅｃｏｕｐｌｉｎｇ．Ｔｈｅｄｉｓｐｅｒｓｉｏｎｒｅｌａｔｉｏｎｓｈｉｐｏｆｇａｔｅｃｏｎｔｒｏｌｌｅｄｐｌａｓｍｏｎｍｏｄｅｓａｒｅｖｅｒｉｆｉｅｄｉｎｇｒａｔｉｎｇｃｏｕｐｌｅｄ２ＤＥＧ．Ｓｔｒｏｎｇｃｏｕｐｌｉｎｇｂｅｔｗｅｅｎｔｈｅｐｌａｓｍｏｎｍｏｄｅｓａｎｄｔｈｅｔｅｒａｈｅｒｔｚｃａｖｉｔｙｍｏｄｅｓａｎｄｈｅｎｃｅｔｈｅｆｏｒｍａｔｉｏｎｏｆｐｌａｓｍｏｎｐｏｌａｒｉｔｏｎｍｏｄｅｓａｒｅｒｅａｌｉｚｅｄｉｎａｇｒｏｕｐｉｎｇｃｏｕｐｌｅｄ２ＤＥＧｅｍｂｅｄｄｅｄｉｎａ，ｔｅｒａｈｅｒｔｚｍｏｄｕｌａｔｉｏｎｗｉｔｈｈｉｇｈｍｏｄｕｌａｔｉｏｎＦａｂｒｙＰ é ｒｏｔｃａｖｉｔｙ．Ｂａｓｅｄｏｎｔｈｅｓａｍｅｇｒａｔｉｎｇｃｏｕｐｌｅｄ２ＤＥＧｄｅｐｔｈａｎｄｔｅｒａｈｅｒｔｚｐｌａｓｍｏｎｅｍｉｓｓｉｏｎａｒｅｏｂｓｅｒｖｅｄ．Ｉｎａｎｔｅｎｎａｃｄｅｆｆｅｃｔｃｈａｎｎｅｌ，ｂｏｔｈｒｅｓｏｎａｎｔａｎｄｎｏｎｒｅｓｏｎａｎｔｅｘｃｉｔａｔｉｏｎｏｆｌｏｃａｌｉｚｅｄｐｌａｓｍｏｎｍｏｄｅｓａｒｅｏｂｓｅｒｖｅｄｂｙｐｒｏｂｉｎｇｔｈｅｔｅｒａｈｅｒｔｚｐｈｏｔｏｃｕｒｒｅｎｔ／ｖｏｌｔａｇｅ．Ａｔｅｒａｈｅｒｔｚｓｅｌｆｍｉｘｉｎｇｍｏｄｅｌｉｓｄｅｖｅｌｏｐｅｄｆｏｒａｎｔｅｎｎａｃｏｕｐｌｅｄｆｉｅｌｄｅｆｆｅｃｔｔｅｒａｈｅｒｔｚｄｅｔｅｃｔｏｒａｎｄｐｒｏｖｉｄｅｓａｇｕｉｄｅｌｉｎｅｆｏｒｔｈｅｄｅｓｉｇｎａｎｄｏｐｔｉｍｉｚａｔｉｏｎｏｆｈｉｇｈｓｅｎｓｉｔｉｖｉｔｙｔｅｒａｈｅｒｔｚｄｅｔｅｃｔｏｒｓ．Ｏｕｒｓｔｕｄｉｅｓｉｎｄｉｃａｔｅ，ｈｉｇｈｓｐｅｅｄａｎｄｈｉｇｈｓｅｎｓｉｔｉｖｉｔｙｔｅｒａｈｅｒｔｚｄｅｔｅｃｔｏｒｓａｎｄｔｈｅｆｏｃａｌｐｌａｎｅａｒｒａｙｓｃａｎｂｅｔｈａｔｒｏｏｍｔｅｍｐｅｒａｔｕｒｅ，ｔｈｅｄｅｖｅｌｏｐｅｄｂｙｕｓｉｎｇｔｈｅｎｏｎｒｅｓｏｎａｎｔｐｌａｓｍｏｎｅｘｃｉｔａｔｉｏｎｉｎａｎｔｅｎｎａｃｏｕｐｌｅｄｆｉｅｌｄｅｆｆｅｃｔｃｈａｎｎｅｌ．Ｈｏｗｅｖｅｒｈｉｇｈｄａｍｐｉｎｇｒａｔｅｏｆｓｏｌｉｄｓｔａｔｅｐｌａｓｍａｗａｖｅｉｓｙｅｔｔｈｅｍａｉｎｈｕｒｄｌｅｔｏｏｖｅｒｃｏｍｅｆｏｒｐｌａｓｍｏｎｔｅｒａｈｅｒｔｚｅｍｉｔｔｅｒｓａｎｄｍｏｄｕｌａｔｏｒｓｂｏｔｈｏｆｗｈｉｃｈｒｅｌｙｏｎｔｈｅｒｅｓｏｎａｎｔｐｌａｓｍｏｎｅｘｃｉｔａｔｉｏｎ．Ｔｈｅｆｏｒｍａｔｉｏｎｏｆｈｉｇｈｑｕａｌｉｔｙｆａｃｔｏｒ，ｍａｎｉｐｕｌａｔｉｏｎｏｆｔｈｅｂｏｕｎｄａｒｙｃｏｎｄｉｔｉｏｎｓｏｆｐｌａｓｍｏｎｐｌａｓｍｏｎｃａｖｉｔｙｉｎｃｌｕｄｉｎｇｔｈｅｓｏｌｉｄｓｔａｔｅｐｌａｓｍａｐｈｙｓｉｃｓｃａｖｉｔｙ，ｕｔｉｌｉｚａｔｉｏｎｏｆｎｅｗｈｉｇｈｅｌｅｃｔｒｏｎｍｏｂｉｌｉｔｙｔｗｏｄｉｍｅｎｓｉｏｎａｌｅｌｅｃｔｒｏｎｉｃｍａｔｅｒｉａｌｓａｎｄｈｉｇｈｑｕａｌｉｔｙ，ｓｍａｌｌ，ｅｔｃ．ｗｏｕｌｄｂｅｔｈｅｆｏｃｕｓｏｆｆｕｔｕｒｅｒｅｓｅａｒｃｈ．ｍｏｄｅｖｏｌｕｍｅｔｅｒａｈｅｒｔｚｒｅｓｏｎａｎｔｃａｖｉｔｙＫｅｙｗｏｒｄｓ：ｔｗｏｄｉｍｅｎｓｉｏｎａｌｅｌｅｃｔｒｏｎｇａｓ；ｐｌａｓｍｏｎ；ｔｅｒａｈｅｒｔｚ；ｇａｌｌｉｕｍｎｉｔｒｉｄｅ

浆料旋涂法制备YSZ薄膜燃料电池研究

图２阴极暴露在静态空气中单电池的性能Ｆｉｇ．２Ｏｕｔｐｕｔｐｅｒｆｏｒｍａｎｃｅｏｆｔｈｅｃｅｌｌｗｉｔｈｔｈｅｃａｔｈｏｄｅ
ｅｘｐｏｓｅｄｔｏｓｔａｔｉｏｎａｒｙａｉｒ
图３阴极以５０ｍＬ／ｍｉｎ的氧气吹扫的单电池输出性能曲线Ｆｉｇ．３Ｏｕｔｐｕｔｐｅｒｆｏｒｍａｎｃｅｏｆｔｈｅｓｉｎｇｌｅｃｅｌｌｗｉｔｈ５０ｍＬ／ｍｉｎＯ２
目前制备ＹＳＺ薄膜的方法有很多，如化学气相沉积（ＣＶＤ）、物理气相沉积（ＰＶＤ）、真空溅射、流延成型、溶胶凝
收稿日期：２００７－０４－２９基金项目：国家“８６３ ”计划项目（Ｎｏ．２００１ＡＡ３２３０９０）作者简介：胡金艳（１９８２—），女，黑龙江省人，硕士研究生，主要研究方向为固体氧化物燃料电池。Ｂｉｏｇｒａｐｈｙ：ＨＵＪｉｎ－ｙａｎ（１９８２ —），ｆｅｍａｌｅ，ｃａｎｄｉｄａｔｅｆｏｒｍａｓｔｅｒ．联系人：吕喆，ｌｖｚｈｅ＠ｈｉｔ．ｅｄｕ．ｃｎ
２．ＤｅｐａｒｔｍｅｎｔｏｆＣｏｎｄｅｎｓｅｄＭａｔｔｅｒ，ＪｉｌｉｎＵｎｉｖｅｒｓｉｔｙ，ＣｈａｎｇｃｈｕｎＪｉｌｉｎ１３００２３，Ｃｈｉｎａ；３．ＩｎｔｅｒｎａｔｉｏｎａｌＣｅｎｔｅｒｆｏｒＭａｔｅｒｉａｌＰｈｙｓｉｃｓ，Ａｃａｄｅｍｉａ，ＳｈｅｎｙａｎｇＬｉａｏｎｉｎｇ１１００１５，Ｃｈｉｎａ）
ＳｔｕｄｙｏｎＹＳＺｆｉｌｍｆｕｅｌｃｅｌｌｂｙｓｌｕｒｒｙｓｐｉｎｃｏａｔｉｎｇｍｅｔｈｏｄ

TM190MFS01规格书 V1.0

SHANGHAI AVIC OPTOELECTRONICSQ/S1016-2011MODEL NO. : ISSUED DATE: VERSION :TM190MFS01 2011/03/16 1.0■Preliminary Specification □Final Product SpecificationCustomer :Approved by NotesSHANGHAI AVIC Confirmed :Prapared by Checked by Approved byWei Zhang 2011/03/16Hyuan Chen 2011/03/17Anfernee Du 2011/03/17This technical specification is subjected to change without noticeThe information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 1 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-2011TABLE OF CONTENTSTABLE OF CONTENTS ........................................................................................................................................... 2 RECORD OF REVISION.......................................................................................................................................... 3 1. OUTLINE.............................................................................................................................................................. 4 1.1 STRUCTURE AND PRINCIPLE..................................................................................................................... 4 1.2 APPLICATIONS.............................................................................................................................................. 4 1.3 FEATURES .................................................................................................................................................... 4 2. GENERAL SPECIFICATIONS.............................................................................................................................. 5 3. ABSOLUTE MAXIMUM RATINGS ....................................................................................................................... 6 4. BLOCK DIAGRAM ............................................................................................................................................... 7 5. MECHANICAL SPECIFICATIONS ....................................................................................................................... 8 6. ELECTRICAL CHARACTERISTICS .................................................................................................................... 9 7. CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS............................................................................ 10 7.1 LVDS ............................................................................................................................................................ 10 7.2 CONNECTION BETWEEN RECEIVER AND TRANSMITTER FOR LVDS................................................. 11 8. DISPLAY COLORS AND INPUT DATA SIGNALS .............................................................................................. 12 9. INTERFACE TIMING.......................................................................................................................................... 13 9.1 TIMING CHARACTERISTICS...................................................................................................................... 13 9.2 INPUT SIGNAL TIMING CHART............................................................................................................... 14 9.3 PIXEL DATA ALIGNMENT OF DISPLAY IMAGE ...................................................................................... 15 9.4. POWER SUPPLY VOLTAGE SEQUENCE................................................................................................. 16 10. OPTICS ............................................................................................................................................................ 18 11. MARKINGS ...................................................................................................................................................... 22 11.1 PRODUCT LABEL...................................................................................................................................... 22 11.2 PACKING.................................................................................................................................................... 23 11.3 INSPECTION RECORD SHEET................................................................................................................ 23 11.4 TRANSPORTATION ................................................................................................................................... 23 11.5 SIZE AND WEIGHT FOR PACKING BOX ................................................................................................. 23 11.6 OUTLINE FIGURE FOR PACKING (For reference) .................................................................................. 24 12. PRECAUTIONS ............................................................................................................................................... 25 12.1 ASSEMBLY AND HANDLING PRECAUTIONS ......................................................................................... 25 12.2 OTHER....................................................................................................................................................... 25 13. OUTDRAWING ................................................................................................................................................ 26The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 2 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-2011RECORD OF REVISIONRev1.0Issued Date2011-03-16DescriptionPreliminary ReleaseEditorWei ZhangThe information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 3 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20111. OUTLINE1.1 STRUCTURE AND PRINCIPLETM190MFS01 open cell is composed of the amorphous silicon thin film transistor liquid crystal display (a-Si TFT LCD) panel structure with driver LSIs for driving the TFT (Thin Film Transistor) array. The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the TFT array glass substrate and a color-filter glass substrate. Color (Red, Green, Blue) data signals from a host system (e.g. PC, signal generator, etc.) are modulated into best form for active matrix system by a signal processing board, and sent to the driver LSIs which drive the individual TFT arrays. The TFT array as an electro-optical switch regulates the amount of transmitted light from the backlight assembly, when it is controlled by data signals. Color images are created by regulating the amount of transmitted light through the TFT array of red, green and blue dots.1.2 APPLICATIONS• Monitor for PC1.3 FEATURES• a-Si TFT active matrix • LVDS interface • R.G.B input 8bit, 16.7 millions colors (6bit+Hi-FRC) • Resolution WXGA+ (1,440× 900 pixels) • Wide viewing angle 85°/85° (L/R); 80°/80° (U/D) • High contrast ratio 1000 :1 • Fast response time (Ton+ Toff= 5 ms）The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 4 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20112. GENERAL SPECIFICATIONSDisplay area Diagonal size of display Drive system Display color Pixel Pixel arrangement Pixel pitch Signal system Power supply voltage408.24 (H) × 255.15 (V) mm (typ.) 48.0 cm (19.0 inches) a-Si TFT active matrix 16.7 M colors (6bit+ Hi-FRC) 1,440 (H) × 900(V) pixels RGB vertical stripe 0.2835 (H) × 0.2835 (V) mm LVDS 2port LCD panel signal processing board: 5.0VThe information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 5 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20113. ABSOLUTE MAXIMUM RATINGSParameter Power supply voltage Input voltage for signals Storage temperature Operating temperature Absolute humidity Operating altitude Storage altitude Symbol VDD Vi Tst Top AH Rating -0.3 ~ +6.0 -0.3 ~ +3.3 -20 ~ +60 0 ~ +50 ≤ 70 ≤ 4,850 ≤ 13,600 Unit V V °C °C g/m3 m m Remarks Ta = 25°C Ta = 25°C Note 3 Note 3, 4 Ta > 50°C 0°C≤ Ta≤ 50°C -20°C≤ Ta≤ 60°CNote1: Display signals are DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-,and CKB+/-. Note2: Function signal is MSL. Note3: Temperature and relative humidity range is shown in the figure below. (a) 90%RH Max. (Ta≤ 40°C) (b) Wet-bulb temperature should be39°C Max. (Ta> 40°C) (c) No condensation. Note4: The temperature of panel display surface area should be 0°C Min and 60°C Max.Relative Humidity（％RH）80 60 Operating Range 40Temperature (℃) -40 -2020 5 0Storage Range 20 40 60 80The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 6 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20114. BLOCK DIAGRAMI/F LCD MODULE100ΩDB0+ DB0DB1+ DB1DB2+ DB2CKB+ CKADB3+ DB3-100Ω 100Ω 100Ω 100Ω 100ΩLVDS ReceiverDA0+ DA0DA1+ DA1DA2+ DA2CKA+ CKADA3+ DA3-100Ω 100Ω 100Ω Timing Controller 100ΩSource DriverLCD Panel H: 1440× 3（R,G,B） V: 900Gate DriverVDDFuseDC/DC ConverterPowerEdge side backlight` VBLH2VBLH1 VBLC1 VBLC2 FG GNDNote: System ground (GND), FG (Frame ground) in the product should be connected together in customer equipment.The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 7 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20115. MECHANICAL SPECIFICATIONSParameter Display area Display dot number Pixel pitch Dot pitch Color arrangement Display color Specification 408.24(H) × 255.15(V) mm (typ.), [48.0 cm (19.0 inches)] 1440×3(H) ×900(V) 0.2835(H)×0.2835(V) 0.0945(H) ×0.2835(V) RGB (Red dot、Green dot、 Blue dot) vertical stripe 16,777,216(6bit+Hi FRC) Unit mm mm mm colorThe information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 8 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20116. ELECTRICAL CHARACTERISTICSParameter Power supply voltage Power supply current Permissible ripple voltage Differential input voltage Differential input threshold voltage for LVDS receiver Input voltage receiver Rush current width for Low High LVDS Symbol VDD IDD VRP min. 4.5 200 -100 0 100 typ. 5.0 700 Note1 max. 5.5 1000 Note 2 200 600 100 3.3 3.0 Unit V mA mV mV mV mV V Ω A at VCM = 1.2V Note3 Note4 Remarks at VDD = 5.0V VDD︱Vid︱ VTLVTH Vi RT IrushTerminating resistorNote 1: Black pattern Note 2: 1H1V dot inverse pattern Note 3: Common mode voltage for LVDS receiver Note4: Measurement Conditions:5V Q1 R1 47K MOSFET-N F1 VDD Fuse(2A) C1 Cap 1uF/16VGND 5V1 S2 3 2 SW-SPDTGND R2 1K Q2 MOSFET-N12VR3C2 Cap 1uF/16V C3 Cap 10uF/16V GND20KThe information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 9 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20117. CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS7.1 LVDSCN1: FI-XB30SSRLA-HF16 (Produced by JAE) or equivalent.Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Name RXO0RXO0+ RXO1RXO1+ RXO2RXO2+ GND RXOCRXOC+ RXO3RXO3+ RXE0RXE0+ GND RXE1RXE1+ GND RXE2RXE2+ RXECRXEC+ RXE3RXE3+ GND GND NC GND VCC VCC VCC Description Negative LVDS differential data input. Channel O0 (odd) Positive LVDS differential data input. Channel O0 (odd) Negative LVDS differential data input. Channel O1 (odd) Positive LVDS differential data input. Channel O1 (odd) Negative LVDS differential data input. Channel O2 (odd) Positive LVDS differential data input. Channel O2 (odd) Ground Negative LVDS differential clock input. (odd) Positive LVDS differential clock input. (odd) Negative LVDS differential data input. Channel O3(odd) Positive LVDS differential data input. Channel O3 (odd) Negative LVDS differential data input. Channel E0 (even) Positive LVDS differential data input. Channel E0 (even) Ground Negative LVDS differential data input. Channel E1 (even) Positive LVDS differential data input. Channel E1 (even) Ground Negative LVDS differential data input. Channel E2 (even) Positive LVDS differential data input. Channel E2 (even) Negative LVDS differential clock input. (even) Positive LVDS differential clock input. (even) Negative LVDS differential data input. Channel E3 (even) Positive LVDS differential data input. Channel E3 (even) Ground Ground Not connection. Ground +5.0V power supply +5.0V power supply +5.0V power supplyCN1: The inserting side is as follows Connector 1, 2 Printed wiring board ……………………. 29, 30The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 10 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20117.2 CONNECTION BETWEEN RECEIVER AND TRANSMITTER FOR LVDSNote1: The lowest bit (RA0, GA0, BA0, RB0, GB0, BB0), the most upper bit (RA7, GA7, BA7, RB7, GB7, BB7) Note2:Connecting cable between LCD panel’s connector and transmitter should use 100Ω twisted line. Note3: If only Hsync and Vsync, the product don’t work. Make sure DE signal has been input.The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 11 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20118. DISPLAY COLORS AND INPUT DATA SIGNALSThis product can display in equivalent to 16,777,216 colors in 256 scales. Also the relation between display colors and input data signals is as the following table.Display colorsBlack BlueData signal （0:Low level，1:High Level）R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B00 0 1 1 0 0 1 1 0 00 0 1 1 0 0 1 1 0 0 00 0 1 1 0 0 1 1 0 0 00 0 1 1 0 0 1 1 0 0 0 : :0 0 1 1 0 0 1 1 0 0 00 0 1 1 0 0 1 1 0 0 00 0 1 1 0 0 1 1 0 0 10 0 1 1 0 0 1 1 0 1 00 0 0 0 1 1 1 1 0 0 00 0 0 0 1 1 1 1 0 0 00 0 0 0 1 1 1 1 0 0 00 0 0 0 1 1 1 1 0 0 0 : :0 0 0 0 1 1 1 1 0 0 00 0 0 0 1 1 1 1 0 0 00 0 0 0 1 1 1 1 0 0 00 0 0 0 1 1 1 1 0 0 00 1 0 1 0 1 0 1 0 0 00 1 0 1 0 1 0 1 0 0 00 1 0 1 0 1 0 1 0 0 00 1 0 1 0 1 0 1 0 0 0 : :0 1 0 1 0 1 0 1 0 0 00 1 0 1 0 1 0 1 0 0 00 1 0 1 0 1 0 1 0 0 00 1 0 1 0 1 0 1 0 0 0Basic Color Red grayscaleRed Magenta Green Cyan Yellow White Black Dark0Bright Red Black1 1 1 0 01 1 1 0 0 01 1 1 0 0 01 1 1 0 0 0 : :1 1 1 0 0 01 1 1 0 0 00 1 1 0 0 01 0 1 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 0 : :0 0 0 0 0 00 0 0 0 0 00 0 0 0 0 10 0 0 0 1 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 0 : :0 0 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 0Green grayscaleDark0Bright Green Black0 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 0 : :0 0 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 01 1 1 0 0 01 1 1 0 0 01 1 1 0 0 01 1 1 0 0 0 : :1 1 1 0 0 01 1 1 0 0 00 1 1 0 0 01 0 1 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 00 0 0 0 0 0 : :0 0 0 0 0 00 0 0 0 0 00 0 0 0 0 10 0 0 0 1 0Blue grayscaleDark0Bright Blue0 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 00 0 01 1 11 1 11 1 11 1 11 1 11 1 10 1 11 0 1The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 12 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20119. INTERFACE TIMING9.1 TIMING CHARACTERISTICSParameter Frequency Clock Rise time, Fall time Duty Horizontal signals Cycle Display period Cycle Display period Setup time DE/Data Hold time Rise time, Fall time Symbol 1/tc tc th thd tv tvd 13.3 912 min. 37.04 27.0 typ. 44.45 22.50 max. 55.56 18.0 Unit MHz ns ns µs CLK CLK 20 1100 ms H H ns ns ns Note 1 Note 1 Remarks LVDS transmitter inputRefer to the timing characteristics of LVDS transmitter 14.8 754 18.0 800 720 16.67 926 900 Refer to the timing characteristics of LVDS transmitter 26.5 90055.5kHz(typ.) 60.0Hz(typ.) -Vertical signalsNote1: See the data sheet of LVDS transmitter.The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 13 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20119.2INPUT SIGNAL TIMING CHART Horizontal timingCLK DATA(A) note1 DATA(B) DEthd thInvalid Invalid 1 2 3 4 1437 1439 1438 1440 Invalid InvalidVertical timing DATA(A),(B)Invalid 1 2 899 900 InvalidDEtvd tvNote 1: DATA(A)=RA0-RA7,GA0-GA7,BA0-BA7 DATA(B)=RB0-RB7,GB0-GB7,BB0-BB7The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 14 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20119.3PIXEL DATA ALIGNMENT OF DISPLAY IMAGEThe following chart is the coordinates of per pixel Odd Pixel: RA= R DATA GA= G DATA BA= B DATA Even Pixel : RB=R DATA GB=G DATA BB=B DATAD(1,1) RA GA BAD(2,1) RB GB BBD(1,1) D(1,2) D(1,3) • • • D(1,900)D(2,1) D(2,2) D(2,3) • • • D(2,900)D(3,1) D(3,2) D(3,3) • • • D(2,900)••• ••• ••• ••• ••• ••• •••D(1440,1) D(1440,2) D(1440,3) • • • D(1440,900)The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 15 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-20119.4. POWER SUPPLY VOLTAGE SEQUENCE9.4.1 The sequence of backlight and powerONt＜10ms *1 4.5V 4.0V 90% 10% 10%VDD0V90% 10%t190%90%t4Display Signals*20Vt290%VALIDt390%Backlight signal t5 t6Timing Specifications:t1 0.47ms<t1 <10ms t2 0.5 ms<t2 <50ms t3 0ms<t3 <50ms t4 >1000ms t5 >200ms t6 >200ms *1. When VDD is on, but the value is lower than 4.5V, a protection circuit may work, then the module may not display. *2 The signal line is not connected with the module, at the end of cable the terminal resistor of 100Ω should be added. Note1: Display signals (D0+/-, D1+/-, D2+/-, D3+/- and CK+/-) must be “0” voltage, exclude the VALID period (See above sequence diagram). If these signals are higher than 0.3 V, the internal circuit is damaged. If some of display signals of this product are cut while this product is working, even if the signal input to it once again, it might not work normally. If customer stops the display signals, they should cut VDD. Note2: When VDD is on, it should be set above 4.0V. Note3: The backlight power supply voltage should be inputted within the valid period of display and function signals, in order to avoid unstable data display.The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 16 of 26SHANGHAI AVIC OPTOELECTRONICS Q/S1016-2011 9.4.2 Power supply voltage ripple When the power supply is designed, the next form can give the reference. If the voltage ripple is over the value in next form, the noise should be seen in display area.Ripple (Measured at input terminal of power supply) VDD (5V to drive the panel) Ripple voltage ≤150mVP-P（Including spike noise）9.4.3 Fuse Parameter VDD Fuse Type F0603FA2000V032T Supplier AEM Rating 2A 32V Fusing current RemarksNote1: There are different power supply systems from the power input terminal. The power supply capacity should be less than the fusing current. If the power supply capacity is above the fusing current, the fuse may blow in a short time, and then nasty smell, smoking and so on may occur.The information contained herein is the exclusive property of SHANGHAI AVIC OPTOELECTRONICS Corporation, and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of SHANGHAI AVIC OPTOELECTRONICS Corporation.Page 17 of 26SHANGHAI AVIC OPTOELECTRONICSQ/S1016-201110. OPTICS10.1 Optical characteristics Base on TFT-LCD module TM190MDS01Note1 ,Note2Parameter Note1 Condition White at center Luminance θR=0°, θL=0° θU=0°, θD=0° White/Black at center Contrast ratio θR=0°, θL=0° θU=0°, θD=0° White Luminance uniformity θR=0°, θL=0° θU=0°, θD=0 White Red Chromaticity Green Blue X coordinate Y coordinate X coordinate Y coordinate X coordinate Y coordinate X coordinate Y coordinate θR=0°, θL=0° Color gamut θU=0°, θD=0 At center,against NTSC White to black Response time Right Viewing angle Left Up Down Black to white Ton+ Toff θU=0°, θD=0°, CR≥10 θU=0°, θD=0°, CR≥10 θR=0°, θL=0°, CR≥10 θR=0°, θL=0°, CR≥10 Ton Toff θR θL θU θD (75) (75) (70) (70) 1.3 3.7 5 85 85 80 80 (2.6) (7.4) (10) ms ms ms 。

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16215资料

PACIFIC DISPLAY DEVICESLCD Component Data SheetModel Number: 1621516 Character by 2 LineAlphanumeric LCD AssemblyWith COG ControllerNo internal backlight assemblyCONTENTSINFORMATION1. GENERALOverview 2 Product1.11.2 Part Numbering System 2Ratings 3 MaximumAbsolute1.31.4 Circuit Block Diagram 3Characteristics 3 Mechanical1.51.6 Input Signal Function 41.7 LCM Contrast Control and Bias 4Dimensions 5 LCD1.82. ELECTRICAL / OPTICAL CHARACTERISTICS2.1 DC Electrical Characteristics 62.2 AC Electrical Characteristics 6Characteristics 8 2.3Optical3. OPERATING PRINCIPALS AND METHODS3.1 LCD Controller Display and Control Functions 94. RELIABILITY 105. PRECAUTIONS FOR USING LCD MODULES 11139 Avenida Victoria – Suite 100 – San Clemente, CA – 92672Tel: 949-361-8957 – Fax: 949-361-9158 – Web: SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 1. GENERAL INFORMATION1.1 Product Overview•16 Character x 2 line Alphanumeric Dot Matrix LCD Module•5V Operation•LCD Controller: Chip on Glass (COG) NT7603 or equivalent alpha-numeric controller• 4 Bit and 8 Bit parallel data interface options•Multiplexing driving: 1/16 duty, 1/4 bias•Operating Mode: TN (Twisted Nematic) or Super Twisted Nematic (STN) technology•LCD Module Service Life: 100,000 hours minimum1.2 Part Numbering System16215-SL-R-ST-12¾•¾••••¾•••¾••¾•(-6) 6 o’clock•(-12) 12 0’clockSPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 162151.3 Absolute Maximum RatingsSupply voltage for logic V DD Supply voltage for LCD V DD – V0 -- V DD +0.3V Input voltage VI -0.3 V DD +0.3 V Standard Operating temperature TOP (-ST) 0 50 ºC Standard Storage temperature TST (-ST) -10 60 ºC Extended Operating temperature TOP (-ET) -20 70 ºC Extended Storage temperature TST (-ET) -30 80 ºC Soldering Temp Tsolder 260 ºC1.4 Circuit Block Diagram ~1.5 Mechanical CharacteristicsItem Contents UnitModule size (W ×H ×T)65 x 27.70 x 2.85 Max mm Viewing area (W ×H) 61.0 × 15.7mm Character matrix (W ×H) 5 × 8dots Character size (W ×H) 2.95 × 5.15mm Dot size (W ×H) 0.55 × 0.60mm Dot pitch (W ×H) 0.60 × 0.65mmSPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 1.6 Input Signal FunctionPin NO. Symbol Level Description1 VSS 0V Ground2 VO --- Bias voltage for LCD (Contrast)3 VDD 5.0V Supply voltage for logic4 RS H/L H : Data signal, L : Instruction signal5 R/W H/L H : Read mode, L : Write modeH,H6 E→ L Chip enable signal7 DB0 H/L Data bit 08 DB1 H/L Data bit 19 DB2 H/L Data bit 210 DB3 H/L Data bit 311 DB4 H/L Data bit 412 DB5 H/L Data bit 513 DB6 H/L Data bit 614 DB7 H/L Data bit 71.7 LCM Contrast Control and BiasSPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 1.8 LCM Dimensions (with Cable)SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 1.8 LCM Dimensions (without Cable – Reference Only)SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 162152. ELECTRICAL / OPTICAL CHARACTERISTICS2.1 DC Electrical Characteristics (V DD = +5V ±10% , V SS = 0V, Ta = 25°C )Parameter Symbol Condition Min Typ Max UnitSupply voltage for logicV DD --- 4.5 5.0 5.5 V Supply current for logic I DD --- --- 1.0 1.5 mA 0°C --- --- --- V 25°C 0 --- V DD V Operating voltage for LCD V DD -V O 50°C --- --- --- V Input voltage ' H ' level V IH --- VDD - 2.2 --- VDD V Input voltage ' L ' levelV IL--- 0 --- 0.8 V2.2 AC Electrical Characteristics• Write ModeCharacteristic Symbol Min. Typ. Max. Unit Test pinE cycle time t C 500 --- --- ns E E rise time t r --- --- 25 ns E E fall timet f --- --- 25 ns E E pulse width (High, Low)t W 300 --- --- ns E R/W and RS set-up time (8 Bit) t SU160 --- --- ns R/W, RS R/W and RS set-up time (4 Bit) t SU1100 --- --- ns R/W, RS R/W and RS hold time t h110 --- --- ns R/W, RS Data set-up time t SU2100 --- --- ns DB 0 ~ DB 7Data hold timet h210 --- --- ns DB 0 ~ DB 7SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 •Read ModepinMin. Typ. Max. Unit Test Characteristic SymbolE cycle time t C500 --- --- ns EE rise time t r--- --- 25 ns EE fall time t f--- --- 25 ns EE pulse width t W300 --- --- ns ER/W and RS set-up time (8 Bit) t SU60 --- --- ns R/W,RSRS R/W and RS set-up time (4 Bit) t SU100 --- --- ns R/W,RS R/W and RS hold time t h10 --- --- ns R/W,Data output delay time t D--- --- 190 ns DB0 ~ DB7Data hold time t DH20 --- --- ns DB0 ~ DB7SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 162152.3 Optical Characteristics (V OP = 4.7V, Ta = 25°C )Item Symbol Condition Min Typ Max Unit Remarks NoteResponse time Tr --- --- 180 --- ms --- 1Tf --- --- 98 --- ms --- 1 Contrast ratio Cr --- --- 7.5 --- --- --- 239 --- --- deg ∅ = 90° 3 35 --- --- deg ∅ = 270°3 37 --- --- deg ∅ = 0° 3 Viewing angle range θCr ≥ 2 36 --- --- deg ∅ = 180° 3SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 3. OPERATING PRINCIPALS AND METHODES3.1 LCD Controller Display and Control FunctionsPlease refer to NOVATEK NT7603 DATASHEET.Pacific Display website: /ics_app%20notes/novatek/NT7603.pdfSPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 4. RELIABILITYLCD Panel Service LifeDefinition of panel service life•100,000 hours minimum at 25° C ±10%•Contrast becomes 30% of initial value•Current consumption becomes three times higher than initial value•Remarkable alignment deterioration occurs in LCD cell layer•Unusual operation occurs in display functionsSPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 5. PRECAUTIONS FOR USING LCD MODULESInstalling LCD ModulesThe hole in the printed circuit board is used to fix LCM as shown in the picture below. Attend to the following items when installing the LCM.1)Cover the surface with a transparent protective plate to protect the polarizer and LC cell.2)When assembling the LCM into other equipment, the spacer to the bit between the LCM and the fitting plateshould have enough height to avoid causing stress to the module surface, refer to the individual specifications formeasurements. The measurement tolerance should be ±0.1mm.Precaution for Handing LCD ModulesSince LCM has been assembled and adjusted with a high degree of precision, avoid applying excessive shocks to the module or making any alterations or modifications to it.1)Cover the surface with a transparent protective plate to protect the polarizer and LC cell.2)Do not alter, modify or change the shape of the tab on the metal frame.3)Do not make extra holes on the printed circuit board, modify its shape or change the positions of components tobe attached.4)Do not damage or modify the pattern writing on the printed circuit board.5)Absolutely do not modify the zebra rubber strip (conductive rubber) or heat seal connector.6)Except for soldering the interface, do not make any alterations or modifications with a soldering iron.7)Do not drop, bend or twist LCM.Electro-Static Discharge ControlSince this module uses a CMOS LSI, the same careful attention should be paid to electrostatic discharge as for an ordinary CMOS IC.1)Make certain that you are grounded when handing LCM.2)Before remove LCM from its packing case or incorporating it into a set, be sure the module and your body havethe same electric potential.3)When soldering the terminal of LCM, make certain the AC power source for the soldering iron does not leak.4)When using an electric screwdriver to attach LCM, the screwdriver should be of ground potentiality to minimizeas much as possible any transmission of electromagnetic waves produced sparks coming from the commutator ofthe motor.5)As far as possible make the electric potential of your work clothes and that of the work bench the groundpotential.6)To reduce the generation of static electricity be careful that the air in the work is not too dried. A relativehumidity of 50%-60% is recommended.Precaution for soldering to the LCM1)Observe the following when soldering lead wire, connector cable and etc. to the LCM.a)Soldering iron temperature : 280°C ± 10°C.b)Soldering time : 3-4 sec.2)Solder : eutectic solder.SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 162153)If soldering flux is used, be sure to remove any remaining flux after finishing to soldering operation. (This doesnot apply in the case of a non-halogen type of flux.) It is recommended that you protect the LCD surface with acover during soldering to prevent any damage due to flux spatters.4)When soldering the electroluminescent panel and PC board, the panel and board should not be detached morethan three times. This maximum number is determined by the temperature and time conditions mentioned above,though there may be some variance depending on the temperature of the soldering iron.5)When remove the electroluminescent panel from the PC board, be sure the solder has completely melted, thesoldered pad on the PC board could be damaged.Precautions for Operation1)Viewing angle varies with the change of liquid crystal driving voltage (VO). Adjust VO to show the best contrast.2)Driving the LCD in the voltage above the limit shortens its life.3)Response time is greatly delayed at temperature below the operating temperature range. However, this does notmean the LCD will be out of the order. It will recover when it returns to the specified temperature range.4)If the display area is pushed hard during operation, the display will become abnormal. However, it will return tonormal if it is turned off and then back on.5)Condensation on terminals can cause an electrochemical reaction disrupting the terminal circuit. Therefore, itmust be used under the relative condition of 40°C , 50% RH.6)When turning the power on, input each signal after the positive/negative voltage becomes stable.Safety•If the LCD panel breaks, be careful not to get the liquid crystal in your mouth. If the liquid crystal touches your skin or clothes, wash it off immediately using soap and plenty of water.Handling•The display panel is made of glass. Do not subject it to a mechanical shock by dropping it or impact.•If the display panel is damaged and the liquid crystal substance leaks out, be sure not to get any in your mouth. If the substance contacts your skin or clothes, wash it off using soap and water.•Do not apply excessive force to the display surface or the adjoining areas since this may cause the color tone to vary.•The polarizer covering the display surface of the LCD module is soft and easily scratched. Handle this polarizer carefully.•If the display surface becomes contaminated, breathe on the surface and gently wipe it with a soft dry cloth. If it is heavily contaminated, moisten cloth with one of the following solvents :o Isopropyl alcoholo Ethyl alcohol•Solvents other than those above-mentioned may damage the polarizer. Especially, do not use the following.o Watero Ketoneo Aromatic solvents•Exercise care to minimize corrosion of the electrode. Corrosion of the electrodes is accelerated by water droplets, moisture condensation or a current flow in a high-humidity environment.•Install the LCD Module by using the mounting holes. When mounting the LCD module make sure it is free of twisting, warping and distortion. In particular, do not forcibly pull or bend the I/O cable or the backlight cable.•Do not attempt to disassemble or process the LCD module.•NC terminal should be open. Do not connect anything.•If the logic circuit power is off, do not apply the input signals.SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY MODULE MODEL NO: 16215 •To prevent destruction of the elements by static electricity, be careful to maintain an optimum work environment.o Be sure to ground the body when handling the LCD modules.o Tools required for assembling, such as soldering irons, must be properly grounded.o To reduce the amount of static electricity generated, do not conduct assembling and other work under dry conditions.o The LCD module is coated with a film to protect the display surface. Exercise care when peeling off this protective film since static electricity may be generated.Storage•When storing the LCD modules, avoid exposure to direct sunlight or to the light of fluorescent lamps•Store the module in a dark place where the temperature is 25 o C ±10 o C and the humidity below 65% RH.•Do not store the module near organic solvents or corrosive gases.•Do not crush, shake, or jolt the module (including accessories).Cleaning•Do not wipe the polarizing plate with a dry cloth, as it may scratch the surface.•Wipe the module gently with soft cloth soaked with a petroleum benzene.•Do not use ketonic solvents (ketone and acetone) or aromatic solvents (toluene and xylene), as they may damage the polarizing plate.Others:•Liquid crystals solidify under low temperature (below the storage temperature range) leading to defective orientation or the generation of air bubbles (black or white). Air bubbles may also be generated if the module is subject to a low temperature.•If the LCD modules have been operating for a long time showing the same display patterns, the display patterns may remain on the screen as ghost images and a slight contrast irregularity may also appear. A normal operating status can be regained by suspending use for some time. It should be noted that this phenomenon does not adversely affect performance reliability.•To minimize the performance degradation of the LCD modules resulting from destruction caused by static electricity etc., exercise care to avoid holding the following sections when handling the modules.-Exposed area of the printed circuit board.-Terminal electrode sections.。

2016 SID 74-1 混合显示柔性OLED+反射式液晶-----日本半导体能源所

Application of Transfer Technology to Manufacturing of Transmissive OLED and Reflective LC Hybrid (TR-Hybrid) Display Takayuki Ohide*, Seiji Yasumoto*, Masataka Nakada*, Hiroki Adachi*, Satoru Idojiri*, Kenichi Okazaki*, Yoshiharu Hirakata**, Johan Bergquist**, and Shunpei Yamazaki***Advanced Film Device Inc., Tochigi, Japan**Semiconductor Energy Laboratory Co., Ltd., Kanagawa, JapanAbstractOur previously established transfer technology using an inorganic separation layer was applied to enable a novel through electrode structure including a conductive material exposed after separation. Using this structure, we succeeded in fabricating a transmissive OLED and reflective LC hybrid display.Author KeywordsTR-Hybrid display; through electrode structure; reflective LCD; OLED display; inorganic separation layer; transfer technology.1. IntroductionRecently, small- to medium-sized mobile devices such as smartphones and tablet PCs have become increasingly popular. Such mobile devices require some of the same properties as general displays, including high image quality and moving image function, and low power consumption. With a focus on reducing power consumption, we fabricated a display that includes two types of display devices between two glass substrates. This display exhibits sufficient display quality in both the reflective and transmissive modes. However, the general structure of the display requires four glass substrates to bond an organic light-emitting diode (OLED) panel to a reflective liquid-crystal display (LCD) panel, making the product heavy. Moreover, since the light-emitting portion of the structure is far from the opening, the light-extraction efficiency cannot be improved.We fabricated a semiconductor device on our novel through electrode structure in which a pixel, terminal, and common contact are exposed after separation through the inorganic-separation-layer process. The combination of the through electrode structure and OLED and reflective LCD processes enabled the fabrication of a display that includes a reflective LCD and an OLED between two glass substrates. In this structure, the distance between a light-emitting portion and the opening is several micrometers or smaller, leading to an improvement in light-extraction efficiency or a reduction in power consumption.This study applies a transfer technology [1–8] to establish a through electrode technique in which a conductive material serving as an electrode is exposed after separation. The through electrode technique is used to expose a pixel electrode, an extraction terminal, and a common contact of a device fabricated over a separation layer on a substrate after separation.2. Structure of TR-Hybrid DisplayFigure 1 is a schematic of a transmissive OLED and reflective LC hybrid (TR-Hybrid) display that includes two types of display devices between two glass substrates. In the pixel, a reflective LCD and a bottom-emission OLED are individually fabricated. To increase the visibility of the display with low power consumption, display is performed by the reflective LCD under outside light [9,10] and by the OLED in dark environments. The transfer technology and through electrode technique are employed for these two different display devices. The through electrode structure, which involves an electrode being exposed after separation, enables the OLED and LCD in the TR-Hybrid display to be driven by one circuit.Figure 1. Schematic of TR-Hybrid display.3. Application of Transfer Technology to ThroughElectrode StructureFigure 2 shows general flexibilization processes. We fabricated flexible displays using an inorganic-separation-layer process using a separation layer containing an inorganic material [6–8]. In the fabrication of a flexible display, the inorganic separation layer lies over a glass substrate, and a passivation layer lies on the flat surface of the separation layer. The passivation layer protects an element layer, which includes field-effect transistors (FETs) and wiring, and an organic electroluminescent layer over the element layer from moisture and oxygen. In the TR-Hybrid display, the passivation layer also protects FETs and an OLED from damage during the LCD process. Owing to the inorganic separation layer, the passivation and element layers can be formed in a general manufacturing process using a glass substrate, and high workability can be obtained. Furthermore, the process temperature can be as high as that for the general manufacturing process in which a glass substrate is used, which provides favorable FET characteristics and a high-quality passivation layer.74-1 / T. Ohide1002 • SID 2016 DIGEST ISSN 0097-966X/16/4702-1002-$1.00 © 2016 SIDFigure 2. Flexibilization processes.Our transfer technology uses a highly reliable passivation layer. By combining the through electrode structure and the inorganic-separation-layer process having these advantages, we developed FET boards for TR-Hybrid displays.Figure 3 provides an overview of the manufacturing process for a TR-Hybrid display employing the through electrode structure. As illustrated in Fig. 3(a), an inorganic separation layer and a passivation layer containing through electrodes are formed on a glass substrate. Subsequently, an FET element is formed through a general FET process. Then, a bottom-emission OLED that emits light through the FET is formed on the board (Fig. 3(b)). Figure 3(c) shows a structure in which the OLED panel is provided on the FET board including the through electrodes; a glass substrate lies beneath the OLED, and the highly reliable passivation layer lies above the OLED. Separation at the passivation–separation layer interface is performed by applying the transfer technology (Fig. 3(d)). Consequently, the glass substrate is separated, and the conductive materials that pass through the passivation layer are exposed. This enables the extraction of FET signals. Using the exposed electrode, extraction terminal, and common contact, the reflective LCD can be fabricated (Fig. 3(e)). Thus, a TR-Hybrid display with the OLED below the FET element and the LCD over the FET element is completed (Fig. 3(f)). As we can see from the structure, the display includes just two glass substrates for supporting the two types of display devices: the reflective LCD and the OLED.The separation force was evaluated using a compact table-top tester (EZ-Test, Shimadzu Corporation). Each sample for evaluation was fabricated as follows: a separation layer and a passivation layer were formed over a glass substrate, the substrate was then cut to dimensions of 25 mm 126 mm, and a film was bonded to the substrate. The perpendicular force required to separate the film was measured for each sample. Figure 4 shows the results for (a) the conventional structure and (b) the through electrode structure. The separation force required for the through electrode structure was similar to that for the conventional structure. This indicates that the through electrode structure can be formed through the conventional separation process.Figure 3. Schematics of manufacturing process ofTR-Hybrid display.Figure 4. Separation force results.74-1 / T. OhideSID 2016 DIGEST • 1003To manufacture the TR-Hybrid display, glass separation was performed after the formation of the OLED panel. Thus, the FET characteristics were evaluated before and after the separation (Figs. 5(a) and 5(b), respectively). No significant differences were observed in the FET characteristics, indicating that the separation did not affect the FET element. This suggests that favorable FET characteristics are retained after the separation process.(a) (b)Figure 5. FET (L/W= 3/3 μm) characteristics (a) before separation and (b) after separation.4. Fabrication of TR-Hybrid Display usingThrough Electrode StructureWe produced a prototype 4.38-inch TR-Hybrid display including a reflective LCD and an OLED using an FET board with the through electrode structure. Table 1 lists the display specifications. The pixel density was 292 ppi. Figure 6 shows photographs of the display. The display can be used in a reflective LCD mode in bright environments (outdoors) and in an OLED display mode in dark environments (indoors). The display can also be used in a hybrid mode, a combination of the two modes. We promote the development of large-sized panels and aim to achieve large and high-definition panels with low power consumption.Table 1. Display specifications.SpecificationScreen Diagonal 4.38 inchEffective Pixels 768 ⨯ RGB ⨯ 1024Pixel Pitch 29 μm ⨯ 87 μmPanel Size 76 mm ⨯ 140.1 mmPixel Density 292 ppiOLED Bottom-emissionOLED LCD ReflectiveLCD (a)(b)Figure 6. Photographs of prototype TR-Hybrid display(a) under outside light and (b) in dark environment.5. ConclusionBy applying a transfer technology using an inorganic separationlayer, we established a novel through electrode technique in whichan electrode is exposed after separation. The technique led to thesuccessful fabrication of a TR-Hybrid display in which an OLEDand a reflective LCD can be driven by one circuit. We expect thatthe application of the display technology will lead to thedevelopment of large-sized panels with high visibility underoutside light and low power consumption.6. References[1]R. Kataishi et al., SID Digest 45, 187 (2014).[2]Y. Jimbo et al., SID Digest 45, 322 (2014).[3]R. Komatsu et al., SID Digest 45, 326 (2014).[4] D. Nakamura et al., SID Digest 46, 1031 (2015).[5] A. Chida et al., SID Digest 44, 196 (2013).[6]S. Idojiri et al., SID Digest 46, 8 (2015).[7]K. Hatano et al., SID Digest 42, 498 (2011).[8]T. Aoyama et al., AM-FPD’13, 223 (2013).[9]S. Fukai et al., SID Digest 45, 1496 (2014).[10]D. Kubota et al., SID Digest 46, 1084 (2015).74-1 / T. Ohide1004 • SID 2016 DIGEST。

M236H1-L01 ver 2.5

TFT LCD Approval Specification MODEL NO.: M236H1- L01Customer:Approved by:Note:- CONTENTS -REVISION HISTORY (3)1. GENERAL DESCRIPTION (4)1.1 OVERVIEW1.2 FEATURES1.3 APPLICATION1.4 GENERAL SPECIFICATIONS1.5 MECHANICAL SPECIFICATIONS2. ABSOLUTE MAXIMUM RATINGS (5)2.1 ABSOLUTE RATINGS OF ENVIRONMENT2.2 ELECTRICAL ABSOLUTE RATINGS2.2.1 TFT LCD MODULE2.2.2 BACKLIGHT UNIT3. ELECTRICAL CHARACTERISTICS (7)3. 1.1 TFT LCD MODULE3.1.2 Vcc Power Dip Condition3.2 BACKLIGHT UNIT4. BLOCK DIAGRAM (12)4.1 TFT LCD MODULE4.2 BACKLIGHT UNIT5. INPUT TERMINAL PIN ASSIGNMENT (13)5.1 TFT LCD MODULE5.2 LVDS DATA MAPPING TABLE5.3 BACKLIGHT UNIT5.4 COLOR DATA INPUT ASSIGNMENT6. INTERFACE TIMING (16)6.1 INPUT SIGNAL TIMING SPECIFICATIONS6.2 POWER ON/OFF SEQUENCE7. OPTICAL CHARACTERISTICS (19)7.1 TEST CONDITIONS7.2 OPTICAL SPECIFICATIONS8. PACKAGING (23)8.1 PACKING SPECIFICATIONS8.2 PACKING METHOD9. DEFINITION OF LABELS (25)10. RELIABILITY TEST (27)11. PRECAUTIONS (28)11.1 ASSEMBLY AND HANDLING PRECAUTIONSSAFETYPRECAUTIONS11.211.3 SAFETY STANDARDS11.4 STORAGE11.5 OPERATION CONDITION GUIDE11.6 OTHER12. MECHANICAL CHARACTERISTICS (30)REVISION HISTORYVersion Date Section DescriptionVer 2.0 Ver 2.1Ver 2.2 Ver 2.3Ver 2.4 Ver 2.515,Aug, 08’3, Sep.08’21, Oct, 08’12, Feb,09’2, Oct,09’30, Dec,09’-6.28.110.32.2.23.11.41.52.17.210.310.42.2.13.16.13.112M236H1 -L01 Approval specification was first issued.Revise Power on/off SequenceRevise 8-1 Packing method PE bagÆAnti-static bagAdd 10.3 Other descriptionWhen fixed patterns are displayed for a long time, remnant image is likely to occur.Revise Lamp current max, 7.5 mA Æ 8.0 mARevise Rush current max, 2.5 A Æ 3.0 ARevise 23.6 “ diagonal Æ 23.547” real diagonalAdd Weight Typ. 2850 gRevise note (5) Gap, 2 mm Æ 3 ~ 5 mmAdd Viewing angle spec with CR 5 conditionAdd section 10.3Add section 10.4Add Item: Logic Input VoltageAdd Item : Logic High Input Voltage; Logic Low Input VoltageLVDS Clock/ Input cycle to cycle jitter: Min, -20*Tc Æ-0.02*TcMax, 20*Tc Æ0.02*TcUnit, psÆnsItems added at LVDS Clock: Input cycle to cycle jitter; Spread spectrummodulation range; Spread spectrum modulation frequency; Note (1); Note (2);Items added at LVDS Data: Note (3)1. LVDS differential input voltage: Min. valueOriginal: 100mVNew: 200mV2. Add note (5)Add Section 121. GENERAL DESCRIPTION1.1 OVERVIEWM236H1-L01 is a 23.6” TFT Liquid Crystal Display module with 4 CCFL Backlight unit and 30 pins2ch-LVDS interface. This module supports 1920 x 1080 Full HD mode and can display up to 16.7M colors.The inverter module for Backlight is not built in.1.2 FEATURES- Extra-wide viewing angle.- High contrast ratio.- Fast response time.- High color saturation.- Full HD (1920 x 1080 pixels) resolution.- DE (Data Enable) only mode.- LVDS (Low Voltage Differential Signaling) interface.- RoHS compliance.- TCO03 compliance1.3 APPLICATION- TFT LCD Monitor1.4 GENERAL SPECIFICATI0NSItem Specification Unit NoteActive Area 521.28(H) x 293.22(V) (23.547” real diagonal) mm(1)Bezel Opening Area 525.22 (H) x 297.22 (V) mmDriver Element a-Si TFT active matrix - -Pixel Number 1920 x R.G.B. x 1080 pixel -Pixel Pitch 0.2715 (H) x 0.2715 (V) mm -Pixel Arrangement RGB vertical stripe - -Display Colors 16.7M color - Transmissive Mode Normally White - -Surface Treatment AG type, 3H hard coating, Haze 25 - - Module Power Consumption 30.82 Watt (2)1.5 MECHANICAL SPECIFICATIONSItem Min. Typ. Max. Unit Note544.3 544.8 545.3 mmHorizontal(H)(1)Module SizeVertical(V)320.0 320.5 321.0 mmDepth(D) 18.2 18.7 19.2 mmg-29002850Weight -Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.Note (2) Please refer to sec.3.1 & 3.2 for more information of power consumption2. ABSOLUTE MAXIMUM RATINGS2.1 ABSOLUTE RATINGS OF ENVIRONMENTValueItemSymbolMin. Max.Unit NoteStorage TemperatureT ST -20 60 ºC(1) Operating Ambient TemperatureT OP 0 50 ºC (1),(2) Shock (Non-Operating) S NOP - 50 G (3), (5) Vibration (Non-Operating) V NOP - 1.5 G (4), (5)Note (1) Temperature and relative humidity range is shown in the figure below.(a) 90 %RH Max. (Ta 40 ºC).(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).(c) No condensation.Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC MaxNote (3) 11ms, half sine wave, 1 time for ± X, ± Y , ± Z. Note (4) 10 ~ 300 Hz, 10min/cycle, 3 cycles each X, Y , Z.Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enoughso that the module would not be twisted or bent by the fixture. The fixing condition is shown as below:2.2 ELECTRICAL ABSOLUTE RATINGS2.2.1 TFT LCD MODULEValueUnit Note Item SymbolMin. Max.Power Supply Voltage Vcc -0.3 +6.0 V (1)Logic Input Voltage Vlogic 3.0 3.6 V2.2.2 BACKLIGHT UNITValueUnit Note Item SymbolMin. Max.(2)Lamp Voltage V L - 2.5KV RMS (1),mA RMSLamp Current I L 3.0 8.0(1), (2)Lamp Frequency F L 40 80 KHz Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation should be restricted to the conditions described under Normal Operating Conditions.Note (2) Specified values are for lamp (Refer to 3.2 for further information).3. ELECTRICAL CHARACTERISTICS3.1 TFT LCD MODULE Ta = 25 ± 2 ºCValueParameterSymbolMin. Typ. Max.Unit NotePower Supply Voltage Vcc 4.5 5.0 5.5 V -Ripple Voltage V RP - - 100 mV - Rush Current I RUSH 3 A (2)White 0.6 0.72 A(3)aBlack0.9 1.08 A (3)bPower Supply Current Vertical Stripe0.85 1.02 A (3)cPower Consumption P LCD 4.5 5.4 Watt (4) LVDS differential input voltage Vid 200 - 600 mV (5) LVDS common input voltage Vic - 1.2 - V Logic High Input Voltage VIH 2.64 3.3 V Logic Low Input Voltage VIL 0 0.66 V Note (1) The module should be always operated within above ranges. Note (2) Power on rush current measurement conditions:SWVcc+5.0VVcc rising time is 470µsNote (3) The specified power supply current is under the conditions at Vcc = 5.0 V, Ta = 25 ± 2 ºC, f v = 60Hz, whereas a power dissipation check pattern below is displayed.Note (4)The power consumption is specified at the pattern with the maximum current Note (5) VID waveform conditionActive Areaa. White PatternActive Areac. Vertical Stripe PatternActive Areab. Black Pattern3.1.2 Vcc Power Dip Condition: Dip condition: ms Td V Vcc V 20,5.40.4≤≤≤Vcc3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºCValueParameter SymbolMin. Typ. Max.Unit NoteLamp Input Voltage V L 846 940 1034 V RMS I L = 7.0 mA Lamp Current I L 3.0 7.0 8.0 mA RMS (1)1900(0)J V RMS (2)Lamp Turn On Voltage V S1500 (25)J V RMS (2)Operating Frequency F L 40 80 KHz (3) Lamp Life Time L BL 50,000 Hrs (5), I L = 7.0mA Power Consumption P L 26.32 W (4), I L = 7.0 mANote (1) Lamp current is measured by current amplify & oscilloscope as shown below:Measure equipment:Current Amplify: Tektronix TCPA300 Current probe: Tektronix TCP312 Oscilloscope: TDS3054BTa = 25 ± 2 ºCNote (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 secondafter startup. Otherwise, the lamp may not be turned on normally. It is the value output voltage of NF circuit.Note (3) The lamp frequency may produce interference with horizontal synchronization frequency from thedisplay, which might cause line flow on the display. In order to avoid interference, the lamp frequency should be detached from the horizontal synchronization frequency and its harmonics as far as possible.Note (4) P L = I L V L 4 (for 4lamps)Note (5) The lifetime of lamp can be defined as the time in which it continues to operate under the conditionTa = 25 2 o C and I L = 7.0 mArms until one of the following events occurs: (a) When the brightness becomes 50% of its original value.(b) When the effective ignition length becomes 80% of its original value.(The effective ignition length is a scope that luminance is over 80% of that at thecenter point.)Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of theinverter must have specifications for the modularized lamp. The performance of the Backlight,such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for the lamp. All the parameters of an inverter should be carefully designed to avoid producing too much current leakage from high voltage output of the inverter. When designing or ordering the inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module should be operated in the same manners when it is installed in your instrument.The output of the inverter must have symmetrical (negative and positive) voltage waveform and symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal synchronous frequency and from its harmonics in order to prevent interference.Requirements for a system inverter design, which is intended to have a better display performance, a better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its leakage current.a. The asymmetry rate of the inverter waveform should be 10% below;b. The distortion rate of the waveform should be within 2 ± 10%;c. The ideal sine wave form shall be symmetric in positive and negative polarities* Asymmetry rate:| I p – I –p | / I rms * 100%* Distortion rate I p (or I –p ) / I rms4. BLOCK DIAGRAM4.1 TFT LCD MODULE4.2 BACKLIGHT UNITNote:On the same side,the same polarity lamp voltage design for lamps is recommended.1 HV(Blue)2 LV(Black)1 HV(Pink)2 LV(White) 1 HV(Blue)2 LV(Black)1 HV(Pink)2 LV(White)5. INPUT TERMINAL PIN ASSIGNMENT5.1 TFT LCD MODULEPin Name Description1 RXO0- Negative LVDS differential data input. Channel O0 (odd)2 RXO0+ Positive LVDS differential data input. Channel O0 (odd)3 RXO1- Negative LVDS differential data input. Channel O1 (odd)4 RXO1+ Positive LVDS differential data input. Channel O1 (odd)5 RXO2- Negative LVDS differential data input. Channel O2 (odd)6 RXO2+ Positive LVDS differential data input. Channel O2 (odd)7 GND Ground8 RXOC- Negative LVDS differential clock input. (odd)9 RXOC+ Positive LVDS differential clock input. (odd)10 RXO3- Negative LVDS differential data input. Channel O3(odd)11 RXO3+ Positive LVDS differential data input. Channel O3 (odd)12 RXE0- Negative LVDS differential data input. Channel E0 (even)13 RXE0+ Positive LVDS differential data input. Channel E0 (even)14 GND Ground15 RXE1- Negative LVDS differential data input. Channel E1 (even)16 RXE1+ Positive LVDS differential data input. Channel E1 (even)17 GND Ground18 RXE2- Negative LVDS differential data input. Channel E2 (even)19 RXE2+ Positive LVDS differential data input. Channel E2 (even)20 RXEC- Negative LVDS differential clock input. (even)21 RXEC+ Positive LVDS differential clock input. (even)22 RXE3- Negative LVDS differential data input. Channel E3 (even)23 RXE3+ Positive LVDS differential data input. Channel E3 (even)24 GND Ground25 NC Not connection, this pin should be open.26 NC Not connection, this pin should be open.27 NC Not connection, this pin should be open.28 Vcc +5.0V power supply29 Vcc +5.0V power supply30 Vcc +5.0V power supplyNote (1) Connector Part No.: STM MSAKT2407P30HA or EquivalentNote (2) The first pixel is odd.Note (3) Input signal of even and odd clock should be the same timing.5.2 LVDS DATA MAPPING TABLEoutput D7 D6 D4 D3 D2 D1 D0LVDSLVDS Channel O0order OG0 OR5 OR4 OR3 OR2 OR1 OR0Dataoutput D18 D15 D14 D13 D12 D9 D8LVDSLVDS Channel O1Dataorder OB1 OB0 OG5 OG4 OG3 OG2 OG1output D26 D25 D24 D22 D21 D20 D19LVDSLVDS Channel O2Dataorder DE NA NA OB5 OB4 OB3 OB2output D23 D17 D16 D11 D10 D5 D27LVDSLVDS Channel O3Data order NA OB7 OB6 OG7 OG6 OR7 OR6output D7 D6 D4 D3 D2 D1 D0LVDSLVDS Channel E0order EG0 ER5 ER4 ER3 ER2 ER1 ER0Dataoutput D18 D15 D14 D13 D12 D9 D8LVDSLVDS Channel E1order EB1 EB0 EG5 EG4 EG3 EG2 EG1Dataoutput D26 D25 D24 D22 D21 D20 D19LVDSLVDS Channel E2Dataorder DE NA NA EB5 EB4 EB3 EB2output D23 D17 D16 D11 D10 D5 D27LVDSLVDS Channel E3Data order NA EB7 EB6 EG7 EG6 ER7 ER65.3 BACKLIGHT UNIT:Pin Symbol Description RemarkPinkVoltageHigh1-1 HVWhiteVoltageLow1-2 LVBlueVoltageHigh2-3 HVBlackVoltageLow2-4 LVNote (1) Connector Part No.: YEONHO 35001HS-02L or equivalent5.4 COLOR DATA INPUT ASSIGNMENTThe brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color. The higher the binary input, the brighter the color. The table below provides the assignment of color versus data input.Data SignalRed Green Blue ColorR7R6 R5 R4 R3R2R1R0G7G6G5G4G3G2G1G0 B7 B6 B5 B4 B3B2B1B0Basic ColorsBlackRedGreenBlueCyanMagentaYellowWhite111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111Gray Scale Of Red Red(0) / DarkRed(1)Red(2)::Red(253)Red(254)Red(255)::111::111::111::111::111::1111::111::11::::::::::::::::::::::::::::::::Gray Scale Of Green Green(0) / DarkGreen(1)Green(2)::Green(253)Green(254)Green(255)::::::::::::::::::111::111::111::111::111::1111::111::11::::::::::::::::Gray Scale Of Blue Blue(0) / DarkBlue(1)Blue(2)::Blue(253)Blue(254)Blue(255)::::::::::::::::::::::::::::::::::111::111::111::111::111::1111::111::11Note (1) 0: Low Level Voltage, 1: High Level VoltageDCLKDEDEDATA6. INTERFACE TIMING6.1 INPUT SIGNAL TIMING SPECIFICATIONSThe input signal timing specifications are shown as the following table and timing diagram .SignalItem Symbol Min. Typ. Max. Unit Note Frequency Fc 58.5474.2598 MHz Period Tc - 13.47- ns Input cycle tocycle jitter T rcl -0.02*Tc - 0.02*Tc ns (1)Spread spectrummodulation range Fclkin_mod 0.98*Fc- 1.02*Fc MHz (2) Spread spectrummodulation frequency F SSM - - 200 KHzHigh Time Tch - 4/7 - Tc - LVDS ClockLow Time Tcl - 3/7 - Tc - Setup Time Tlvs 600 - - psLVDS Data Hold Time Tlvh 600 - - ps (3)Frame Rate Fr 50 60 75 Hz Tv=Tvd+Tvb Total Tv 1115 1125 1136 Th -Display Tvd 1080 1080 1080 Th - Vertical Active Display TermBlank Tvb 35 45 56 Th - Total Th 1050 1100 1150 Tc Th =Thd+ThbDisplay Thd 960 960 960 Tc -Horizontal Active Display Term Blank Thb 90 140 190 Tc - Note: Because this module is operated by DE only mode, Hsync and Vsync input signals are ignored.INPUT SIGNAL TIMING DIAGRAMNote (1) The input clock cycle-to-cycle jitter is defined as below figures. Trcl = I T 1 – TINote (2) The SSCG (Spread spectrum clock generator) is defined as below figures.Note (3) The LVDS timing diagram and setup/hold time is defined and showing as the following figures.LVDS RECEIVER INTERFACE TIMING DIAGRAMRXn+/- 141T 143T 145T 147T 149T 1411T 1413T6.2 POWER ON/OFF SEQUENCETo prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram below.Timing Specifications:0.5< t1 ¡ 10 msec0 < t2 50 msec 0 < t3 50 msect4 ¡ 500 msec t5 ¡ 450 msec t6 ¡ 90 msec 5< t7 100 msecNote.(1) The supply voltage of the external system for the module input should be the same as the definition of Vcc. (2) When the backlight turns on before the LCD operation of the LCD turns off, the display may momentarilybecome abnormal screen.(3) In case of VCC = off level, please keep the level of input signals on the low or keep a high impedance. (4) T4 should be measured after the module has been fully discharged between power off and on period. (5) Interface signal shall not be kept at high impedance when the power is on.(6) CMO won’t take any responsibility for the products which are damaged by the customers not following the Power Sequence.(7) There might be slight electronic noise when LCD is turned off (even backlight unit is also off). To avoid this symptom, we suggest "Vcc falling timing" to follow "t7 spec".- Power Supply for LCD, Vcc- Interface Signal(LVDS Signal of Transmitter), V I - Power for Backlight 0V0V7. OPTICAL CHARACTERISTICS7.1 TEST CONDITIONSItem Symbol Value UnitAmbient Temperature Ta 25±2 oC Ambient Humidity Ha 50±10 %RH Supply Voltage V CC 7V V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Lamp Current I L 7.0±0.5 mAInverter Operating Frequency F L 55±5 KHzInverter Darfon VK.13165.1017.2 OPTICAL SPECIFICATIONSThe relative measurement methods of optical characteristics are shown in 7.2. The following items should be measured under the test conditions described in 7.1 and stable environment shown in Note (5).ItemSymbol ConditionMin.Typ. Max.UnitNoteRx 0.647 RedRy 0.334 Gx 0.284 Green Gy 0.607 Bx 0.151 Blue By 0.071 Wx 0.313 ColorChromaticity (CIE 1931)WhiteWy Typ - 0.030.329Typ +0.03 - (1), (5)Center Luminance of White(Center of Screen)L C 250 300 - cd/m 2(4), (5)Contrast Ratio CRθx =0°, θY =0°CS-1000T700 1000 - - (2), (5)T R - 1.5 2.5Response Time T F θx =0°, θY =0°- 3.5 5.5 ms (3) White VariationδW θx =0°, θY =0° - - 1.33 - (5), (6)θx + 75 85 - Horizontalθx - 75 85 -θY + 70 80 - Viewing AngleVertical θY - CR 10 70 80 -Deg.(1), (5)θx + 80 89 --- Horizontalθx - 80 89 ---θY + 75 85 --- Viewing AngleVerticalθY - CR 5 75 85 ---Deg.(1), (5)Note (1) Definition of Viewing Angle (θx, θy):Note (2) Definition of Contrast Ratio (CR):The contrast ratio can be calculated by the following expression. Contrast Ratio (CR) = L255 / L0 L255: Luminance of gray level 255 L 0: Luminance of gray level 0 CR = CR (5)CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).Note (3) Definition of Response Time (T R , T F ):Optical 100% 90%10% 0%Note (4) Definition of Luminance of White (L C):Measure the luminance of gray level 255 at center pointL C = L (5)L (x) is corresponding to the luminance of the point X at Figure in Note (6).Note (5) Measurement Setup:The LCD module should be stabilized at given temperature for 40 minutes to avoid abrupt temperature change during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for 40 minutes in a windless room.Note (6) Definition of White Variation (δW):Measure the luminance of gray level 255 at 9 pointsδW = Maximum [L (1) ~ L (9)] / Minimum [L (1) ~ L (9)]Active Area V e r t i c a l L i n e : Test Point X=1 to 98. PACKAGING8.1 PACKING SPECIFICATIONS(1) 7 LCD modules / 1 Box(2) Box dimensions: 620(L) X 348(W) X 430(H) mm(3) Weight: approximately: 21.82kg (7 modules per box)8.2 PACKING METHOD(1) Carton Packing should have no failure in the following reliability test items.Test ItemTest Conditions Note VibrationISTA STANDARD Random, Frequency Range: 1 – 200 Hz Top & Bottom: 30 minutes (+Z), 10 min (-Z), Right & Left: 10 minutes (X) Back & Forth 10 minutes (Y) Non Operation Dropping Test1 Corner , 3 Edge, 6 Face, 45.7cm Non OperationFigure. 8-1 Packing methodSea / Land Transportation (40ft HQ Container) Sea / Land Transportation (40ft Container)Figure. 8-2 Packing methodFigure. 8-3 Packing method9. DEFINITION OF LABELS9.1 CMO MODULE LABELThe barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.(a) Model Name: M236H1-L01(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.(c) CMO barcode definition:Serial ID: XX-XX-X-XX-YMD-L-NNNNCode Meaning DescriptionXX CMO internal use -XX Revision Cover all the changeX CMO internal use -XX CMO internal use -YMD Year, month, day Year: 0~9, 2001=1, 2002=2, 2003=3…2010=0, 2011=1, 2012=2… Month: 1~12=1, 2, 3, ~, 9, A, B, CDay: 1~31=1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U.L Product line # Line 1=1, Line 2=2, Line 3=3, …NNNN Serial number Manufacturing sequence of product (d) Customer’s barcode definition:Serial ID: CM-23H11-X-X-X-XX-L-XX-L-YMD-NNNNCode Meaning Description CM Suppliercode CMO=CM23H11 Model number M236H1-L01= 23H11X Revision code Non ZBD: 1,2,~,8,9 / ZBD: A~ZX Source driver IC code X Gate driver IC code Century=1, CLL=2, Demos=3, Epson=4, Fujitsu=5, Himax=6, Hitachi=7, Hynix=8, LDI=9, Matsushita=A, NEC=B, Novatec=C, OKI=D, Philips=E, Renasas=F, Samsung=G, Sanyo=H, Sharp=I, TI=J, Topro=K, Toshiba=L, Windbond=MXX Cell location Tainan Taiwan=TN, Ningbo China=CN L Cell line # 1,2,~,9,A,B,~,Y,ZXX Modulelocation Tainan, Taiwan=TN ; Ningbo China=NP L Module line # 1,2,~,9,A,B,~,Y,ZYMD Year, month, day Year: 0~9, 2001=1, 2002=2, 2003=3…2010=0, 2011=1, 2012=2… Month: 1~12=1, 2, 3, ~, 9, A, B, CDay: 1~31=1, 2, 3, ~, 9, A, B, C, ~, T, U, VNNNN Serial number By LCD supplier(e) FAB ID(UL Factory ID):Region Factory IDTWCMO GEMNNBCMO LEOONBCME CANONHCMO CAPG10. Reliability TestEnvironment test conditions are listed as following table.Items RequiredConditionNote Temperature Humidity Bias (THB) Ta= 50¢J, 80%RH, 240hoursHigh Temperature Operation (HTO) Ta= 50¢J, 50%RH, 240hoursLow Temperature Operation (LTO) Ta= 0¢J, 240hoursHigh Temperature Storage (HTS) Ta= 60¢J, 240hoursLow Temperature Storage (LTS) Ta= -20¢J, 240hoursVibration Test (Non-operation) Acceleration: 1.5 GWave: Half-sineFrequency: 10 - 300 HzSweep: 30 Minutes each Axis (X, Y, Z)Shock Test (Non-operation) Acceleration: 50 GWave: Half-sineActive Time: 11 msDirection: ± X, ± Y, ± Z.(one time for each Axis)Thermal Shock Test (TST) -20¢J/30min, 60¢J / 30min, 100 cyclesOn/Off Test 25¢J, On/10sec, Off /10sec, 30,000 cyclesContact Discharge: ± 8KV, 150pF(330Ω) ESD (Electro Static Discharge)Air Discharge: ± 15KV, 150pF(330Ω)Altitude Test Operation:10,000 ft / 24hours Non-Operation:30,000 ft / 24hours11. PRECAUTIONS11.1 ASSEMBLY AND HANDLING PRECAUTIONS(1) Do not apply rough force such as bending or twisting to the module during assembly.(2) To assemble or install module into user’s system can be only in clean working areas. The dust and oilmay cause electrical short or worsen the polarizer.(3) It’s not permitted to have pressure or impulse on the module because the LCD panel and Backlight willbe damaged.(4) Always follow the correct power sequence when LCD module is connecting and operating. This canprevent damage to the CMOS LSI chips during latch-up.(5) Do not pull the I/F connector in or out while the module is operating.(6) Do not disassemble the module.(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft andeasily scratched.(8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damageLCD module when it is operating.(9) High temperature or humidity may reduce the performance of module. Please store LCD module withinthe specified storage conditions.(10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, theresponse time will become slowly, and the starting voltage of CCFL will be higher than room temperature.11.2 SAFETY PRECAUTIONS(1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock whileassembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. Incase of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.(3) After the module’s end of life, it is not harmful in case of normal operation and storage.11.3 SAFETY STANDARDSThe LCD module should be certified with safety regulations as follows:(1) UL60950-1 or updated standard.(2) IEC60950-1 or updated standard.11.4 OTHERWhen fixed patterns are displayed for a long time ,remnant image is likely to occur.12. MECHANICAL CHARACTERISTICS[Refer to the next 2 pages]。

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P-157 / Z. Ge P-157: A Single Cell-gap Transflective VA LCD using Positive Liquid Crystal Materials Zhibing Ge1, Xinyu Zhu2, Thomas X. Wu1, and Shin-Tson Wu2 1School of Electrical Engineering & Computer Science, University of Central Florida, Orlando, FL 32816

2College of Optics and Photonics, University of Central Florida, Orlando, FL 32816

Abstract We propose a single cell gap vertical-alignment transflective LCD with patterned electrodes using a positive dielectric anisotropic liquid crystal. As compared to prior attempts using a positive LC in VA configurations, our new design significantly reduces the threshold and on-state voltages to a range reachable by portable electronic displays. In addition, the light efficiency is also enhanced and it only requires a single gamma curve for both transmissive and reflective modes.

1. Introduction The rapid development of portable electronics, such as mobile phones, e-books, and personal digital assistants (PDAs), generates a growing demand for displays with low power consumption, good outdoor readability, and compact size. Among various display technologies, transflective liquid crystal display (LCD) [1,2] seems a good candidate owing to its capability to meet these requirements. It can obtain high image quality under low ambient environment by using the transmissive (T) mode; and show good readability under strong ambient light conditions and low power consumption when operating in reflective (R) mode.

Most of the transflective LCDs use dual cell gap configuration [1,2] to optimize the optical efficiency. But the need for accurate control of the cell gaps results in complicated fabrication process and low yield and, thus, increases the cost. Therefore, transflective LCDs using a single cell gap would be highly desirable. The main drawback of a single cell gap LCD is the difficulty of obtaining both high T and R light efficiency simultaneously, if same liquid crystal cell configuration is

employed. However, in reality the T mode shows better image quality and is used more frequently than the R mode, which is mainly for outdoor ambient. Therefore, we follow this strategy to optimize the T mode for transflective LCDs.

Vertical alignment (VA) mode is widely employed in the single cell gap transflective LCDs because of its high contrast ratio and simple optical configuration. Negative dielectric anisotropy (∆ε) LC materials are often employed in VA transflective LCDs, but they usually have a higher viscosity, smaller ∆ε value, and are more expensive than the positive ∆ε LCs. Recently, a VA transflective LCD using a positive ∆ε LC material in the VA-IPS structure [3] was attempted [4]. However, for the transflective LCD shown in Ref. 4, it is rather difficult to lower the threshold voltage and the driving voltage simultaneously. Even using a large ∆ε LC mixture (∆ε = 22.4), the observed threshold voltages for T and R modes are around 4Vrms and

2.5Vrms, respectively. And the on-state voltage is ~4.5Vrms for both T and R modes. Besides, this transflective device shows a low light efficiency (T<60% and R<15% with maximum possible efficiency of 100%). Therefore, further adoption of this structure with positive ∆ε LC materials is prohibited.

In this paper, we propose a new VA transflective LCD using a positive ∆ε LC material with patterned electrodes. The threshold voltage is reduced to around 2.0Vrms and on-state voltage is around 4.8Vrms for both T and R modes. A TFT-grade MLC-6686 LC with ∆ε~10 is used in the design. The maximum light efficiency of T and R modes is enhanced to 90% and 32%, respectively. Moreover, in our design an inherently two-domain structure results in a good viewing angle. Thus, our transflective LCD design has potential for practical applications.

ISSN0006-0966X/06/3701-0802-$1.00+.00 © 2006 SID 802 • SID 06 DIGESTP-157 / Z. Ge 2. Device Configuration Figure 1 shows the device configuration of our new transflective LCD. The VA cell interposed between two glass substrates is sandwiched between two circular polarizers, which is composed of a linear polarizer and a broadband quarter wave plate (QWP). Each broadband QWP is comprised of a narrow-band half wave film and quarter wave film with their optic axes inclined at 60º [5]. To compensate the dark state viewed at off-axis, a negative C plate [6,7] is laminated between the broadband QWP and the top substrate.

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