AD6523AD6524datasheet[1]

合集下载

半导体传感器AD7324BRUZ中文规格书

半导体传感器AD7324BRUZ中文规格书

The following is the list of Analog Devices, Inc. processors supported by the IAR Embedded WorkBench®develop-ment tools. For information about the IAR Embedded WorkBench product and software download, The ADSP-CM40x processors are based on the ARM Cortex®-M4 core and are designed for motor controland industrial applications.The ADSP-CM41x processors are based on the ARM Cortex-M4 and ARM Cortex-M0 cores and are de-signed for motor control and industrial applications.Product InformationProduct information can be obtained from the Analog Devices Web site and CrossCore Embedded Studio online Help system.Analog Devices Web SiteThe Analog Devices Web site, provides information about a broad range of products—ana-log integrated circuits, amplifiers, converters, and digital signal processors.To access a complete technical library for each processor family, go to:The manuals selection opens a list of current manuals related to the product as well as a link to the previ-ous revisions of the manuals. When locating your manual title, note a possible errata check mark next to the title that leads to the current correction report against the manual.Also note, is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive weekly e-mail notifications containing updates to the Web pages that meet your interests, including documentation errata against all manuals. provides access to books, application notes, data sheets, code examples, and more. Visit to sign up. If you are a registered user, just log on. Your user name is your e-mail address. EngineerZoneEngineerZone is a technical support forum from Analog Devices. It allows you direct access to ADI technical sup-port engineers. You can search FAQs and technical information to get quick answers to your embedded processing and DSP design questions.Use EngineerZone to connect with other DSP developers who face similar design challenges. You can also use this open forum to share knowledge and collaborate with the ADI support team and your peers. Visit http:// to sign up.ADSP-BF7xx Blackfin+ Processor xxxNotation ConventionsText conventions used in this manual are identified and described as follows. Additional conventions, which apply only to specific chapters, may appear throughout this document.Example DescriptionFile > Close Titles in reference sections indicate the location of an item within the CrossCoreEmbedded Studio IDE's menu system (for example, the Close command appearson the File menu).{this | that}Alternative required items in syntax descriptions appear within curly brackets andseparated by vertical bars; read the example as this or that. One or the other isrequired.[this | that]Optional items in syntax descriptions appear within brackets and separated byvertical bars; read the example as an optional this or that.[this, …]Optional item lists in syntax descriptions appear within brackets delimited bycommas and terminated with an ellipse; read the example as an optional comma-separated list of this..SECTION Commands, directives, keywords, and feature names are in text with LetterGothic font.filename Non-keyword placeholders appear in text with italic style format.NOTE:NOTE: For correct operation, ...A note provides supplementary information on a related topic. In the online ver-sion of this book, the word NOTE: appears instead of this symbol. CAUTION:CAUTION: Incorrect device operation may result if ...CAUTION: Device damage may result if ...A caution identifies conditions or inappropriate usage of the product that couldlead to undesirable results or product damage. In the online version of this book,the word CAUTION: appears instead of this symbol.ATTENTION:ATTENTION: Injury to device users may result if ...A warning identifies conditions or inappropriate usage of the product that couldlead to conditions that are potentially hazardous for devices users. In the onlineversion of this book, the word ATTENTION: appears instead of this symbol. Register Documentation ConventionsRegister diagrams use the following conventions:•The descriptive name of the register appears at the top with the short form of the name.•If a bit has a short name, the short name appears first in the bit description, followed by the long name.•The reset value appears in binary in the individual bits and in hexadecimal to the left of the register.•Bits marked X have an unknown reset value. Consequently, the reset value of registers that contain such bits is undefined or dependent on pin values at reset.ADSP-BF7xx Blackfin+ Processor xxxiIntroduction 1 IntroductionThis Blackfin+ Processor Programming Reference provides details on the assembly language instructions used by Black-fin+ processors. The Blackfin+ architecture extends the Micro Signal Architecture (MSA) core developed jointly by Analog Devices, Inc. and Intel Corporation. This manual applies to all ADSP-BF7xx processor derivatives. All devi-ces provide an identical core architecture and instruction set. Additional architectural features are only supported by some devices and are identified in the manual as being optional features. A read-only memory-mapped register, FEATURE0, enables run-time software to query the optional features implemented in a particular derivative. Some details of the implementation may vary between derivatives. This is generally not visible to software, but system and test code may depend on very specific aspects of the memory microarchitecture. Differences and commonalities at a global level are discussed in the Memory chapter. For a full description of the system architecture beyond the Black-fin+ core, refer to the specific hardware reference manual for your derivative. This section points out some of the conventions used in this document.The Blackfin+ processor combines a dual-MAC signal processing engine, an orthogonal RISC-like microprocessor instruction set, flexible Single Instruction, Multiple Data (SIMD) capabilities, and multimedia features into a single instruction set architecture.Core ArchitectureThe Blackfin+ processor core contains two 16-bit multipliers (MACs), one 32-bit MAC, two 40-bit accumulators, one 72-bit accumulator, two 40-bit Arithmetic Logic Units (ALUs), four 8-bit video ALUs, and a 40-bit shifter, shown in the Processor Core Architecture figure. The Blackfin+ processors work on 8-, 16-, or 32-bit data from the register file.ADSP-BF7xx Blackfin+ Processor1–1。

单片同步V/F转换器AD652原理及应用

单片同步V/F转换器AD652原理及应用

单片同步V/F转换器AD652原理及应用
高光天
【期刊名称】《微计算机信息》
【年(卷),期】1994(000)006
【摘要】从应用角度出发概述了一种新型V/F转换器AD652的外部特性、内部结构及使用方法。

最后给出了用作高分辨率A/D转换器的应用实例。

【总页数】3页(P62-64)
【作者】高光天
【作者单位】无
【正文语种】中文
【中图分类】TP335.1
【相关文献】
1.AD1672单片12位模数转换器的原理及应用 [J], 高光天
2.同步采样A/D转换器AD7262原理及应用 [J], 钟念兵;肖全红;王玲
3.高精度同步V/F转换器:—AD652的原理及其应用 [J], 纪宗南
4.电压频率转换器AD652原理及在电子称重仪中的应用 [J], 姚永刚[1];卢家成[2]
5.北京英斯泰克电气工程公司特约稿——单片同步V/F转换器AD652原理及应用[J], 高光天
因版权原因,仅展示原文概要,查看原文内容请购买。

常用的功率场效应管(5V逻辑电平驱动)(贴片封装)

常用的功率场效应管(5V逻辑电平驱动)(贴片封装)

常用的功率场效应管( 5V逻辑电平驱动)(贴片封装) 在由单片机、数字集成块等组成的电路中,当被控制电路部分也用5V电源供电时,我们选用的功率场效应管就要求其阀值电压不超过3V,以便由5V的逻辑电平直接驱动它们。

型号生产公司封装沟道主要特性参数备注沟道 20V/7A/24mΩ双管NAO8822 AOS TSSOP-8APM4953 ANPEC茂达 SO-8 P 沟道 -30V/-4.9A/80mΩ双管沟道 30V/52A/20mΩCEB6030L CET华瑞 TO-263 N沟道 30V/60A/15mΩCEB6031L CET华瑞 TO-263 N沟道 30V/25A/40mΩCEB603AL CET华瑞 TO-263 NFDS4953 FAIRCHILD沟道 -30V/-5A/95mΩ双管SO-8 PTO-252 N沟道 30V/67A/10mΩFDD6644 FAIRCHILDTO-252 N沟道 30V/54A/14mΩFDD6692 FAIRCHILD沟道 30V/51A/0.017ΩFQB60N03L FAIRCHILD TO-263 N沟道 -30V/-5A/80mΩSO-8 PSI9435DY FAIRCHILD沟道 30V/67A/10mΩTO-252 NFDD6644 FAIRCHILDTO-252 N沟道 30V/54A/14mΩFDD6692 FAIRCHILD沟道 -30V/-10A/0.02ΩIRF7416 IR SO-8 P沟道 30V/13A/9mΩIRF7823PbF IR SO-8 NIRF7832ZPbF IR SO-8 N沟道 30V/21A/4mΩ沟道 60V/210A/300W/3mΩIRFS3206PbF IR TO-263 NIRFS3306PbF IR TO-263 N沟道 60V/160A/300W/4mΩ沟道 25v/50A/12mΩIPD09N03LA Infineon TO-252 N沟道 16V/6A/20mΩ双管NNK8810 NANKERTSSOP-8沟道 20V/10A/24mΩ双管PMWD20XN PHILIPS SOT530 N沟道 55V/58A/20mΩPHB60N06LT PHILIPS SOT-404 NPHB66NQ03LT PHILIPS SOT-404 N 沟道 25V/66A/16mΩPHD66NQ03LT PHILIPS SOT-428 N 沟道 25V/66A/16mΩ沟道 -20V/-2.8A/120mΩSOT-23-3L PST2301 STANSON沟道 20V/2.8A/80mΩSOT-23-3L NST2302 STANSON沟道 -30V/-2.0A/180mΩSOT-23-3L PST2303 STANSONSOT-23-3L N沟道 30V/2.0A/105mΩST2304 STANSON沟道 -10V/-3.5A/50mΩSOT-23-3L PST2305 STANSONSOT-23-3L N沟道 30V/2.8A/95mΩST2306 STANSONSOT-23-3L P沟道 -30V/-2.5A/115mΩST3403 STANSONSUD30N03-30 VISHAY TO-252 N沟道 30V/30A/0.045ΩSTB60N03L-10 ST TO-263 N 沟道 30V/60A/10mΩ沟道 30V/60A/9mΩSTD60NH03L ST TO-252 N。

ISL6524主板CPU供电控制芯片

ISL6524主板CPU供电控制芯片

ISL6524是主板CPU供电控制芯片,常用于845芯片组以下的主板中,如QDI W1E2/OMB主板。

ISL6524的内部电路框图 ISL6524PWMEA1VCCPGOODPWMGNDVSEN1OCSETVID3VID2VID1VID0FBCOMP DACOUTUGATEPHASE200µA28µA4.5V+-+-+-+-VID25LGATE PGND DRIVE4DRIVE3VSEN3+-INHIBITDRIVE2FIXEA2FAULT/RT VSEN2+-+-+-1.8V or 1.26V(DAC)+-VCCVCCSS131.2VDRIVE1+-+VSEN4FAULTOVOC-SS24+-VAUXVAUX0.90x 1.10x 1.15x x0.75x0.90+-1.5V or 1.26V28µA4.5VVCCVTTPG+-x0.75+-EA3EA4UV3UV4UV2D CLK QQ >SET CLR软启动&错误逻辑DAC转换器驱动控制器上电复位振荡器同步驱动器控制器 ISL6524的各引脚功能 ISL6524的针脚封装图DRIVE2FIX VID3VID2FAULT/RT VSEN2SS24SS13VSEN4VCC PGND LGATE PHASE DRIVE3COMP GND VAUX DRIVE4UGATE 28272625242322212019181716151234567891011121314PGOOD VID1VTTPG VSEN1VSEN3VID0VID25OCSET FB 引脚号引脚名称引脚功能1DRIVE2 1.2V 供电开关管驱动信号输出端2FIX 1.5V、1.2V 供电电压补偿端,通常空置不用3VID3CPU 电压模式识别端。

若这5个引脚均悬空,则工作在“无CPU”模式,此时无控制信号输出4VID25VID16VID07VID258PGOOD POWER GOOD 信号输出端9VTTPG VTT 电压POWER GOOD 信号输出端10FAULT/RT 过压保护信号输出端/振荡电阻连接端11VSEN2 1.2V 供电检测反馈输入端12SS24软启动控制端13SS13软启动控制端14VSEN4北桥芯片1.8V 供电检测反馈输入端15DRIVE4北桥芯片1.8V 供电开关管驱动信号输出端16VAUX 3.3V 供电输入端17GND 接地端18DRIVE3AGP 显卡1.5V 供电开关管驱动信号输出端19VSEN3AGP 显卡1.5V 供电检测反馈输入端20COMP 误差放大器输出端21FB 主电压反馈输入端22VSEN1主电压检测输入端23OCSET 振荡频率设置端24PGND 接地端25LGATE 下开关管驱动信号输出端26PHASE 电流检测输入端27UGATE 上开关管驱动信号输出端28Vcc+12V 供电电压输入端 ISL6524的输出电压由3-7引脚控制,而这些引脚电平的组合便可以控制输出电压递增或递减。

ADI论坛问答集锦1

ADI论坛问答集锦1

本人使用AD420的电流0~24mA输出模式,参考了AD420资料上给出的电路设
计。我现在有几个问题想不明白:
1)20和21脚外接的电容接地可以吗(本人的电路是这么接的)?如果接地的
话是否对输出有什么影响?
24
AD420
关于AD420的输出问题!
2)本人用单片机对AD420输入一个数据10913希望得到4mA的电流输出,但很 遗憾,一直输出4.2mA,我用示波器测了DIN,CLK和LATCH脚,波形和时序都
大家好,现用AD2S1210,设置分辨率为10bit时,A,B输出正常;设置分辨率 22 AD2S1210 AD2S1210的A,B输出问题 为12bit时,在旋转变压器不转动时,A,B会有矩形波产生,频率不定,不知道 /adi/showtopic.aspx?id=221360
的电桥不平衡电压),同时在工作一两分钟后,会问到特别的臭味,同时芯
片左上部分特别烫。不知道各位能否提供好的解决方案或建议或者更多的应
用实例。十分感谢。
2
2B31 2B31的问题
采集两路应变信号,分别用2B31进行调理,设定的放大倍数是500,低通滤波 频率100Hz。现在当输入电压差为1.5V时,未经滤波和经过滤波的输出电压都 是3.64V。其他给定电压输出也不正常。请问会是什么原因?我确定放大和滤 /ADI/ShowTopic.aspx?id=118832 波用的电阻都没有问题。 附上电路图。采用外部3V电源对应变片供电的。
有个buffer电路,想请教
大家
恳请各位网友给我推荐几个型号的运放,帮我解决!
/ADI/ShowTopic.aspx?id=99077
无论你们提供什么方法,我都会试一试的。从去年到现在这个问题已经把我 折磨的没有一点办法了!!

BL6522B 高精度三相多功能电能计量芯片 产品说明书

BL6522B 高精度三相多功能电能计量芯片 产品说明书
BL6522B
高精度三相多功 能明书
(版本:1.0)
如需得到最新的产品信息,请与上海贝岭有限公司联系,本公司保留不需要通知本数据 手册读者而修改本数据手册的权利。
Edit by Richard Han, Shi Fei, Fei yu hang
1)电参数性能指标................................................................................................................. 12 2)极限范围 ........................................................................................................................... 15 二 工作原理 ............................................................................................................................................ 17 (一)系统框图及原理.................................................................................................................... 17 1)三相原理结构描述图 ......................................................................................................... 17 2)单相原理结构描述图(以 A 相为例)................................................................................ 19 (二)电流电压瞬态波形测量前端(以 A 相为例) ........................................................................ 20 1)前端增益调整 .................................................................................................................... 20 2)相位补偿 ........................................................................................................................... 20 3)输入偏差校正 .................................................................................................................... 21 4)通道增益校正 .................................................................................................................... 21 5)电流电压波形输出 ............................................................................................................. 22 6)电压通道增益粗调 ............................................................................................................. 22 (三)有功功率计量原理(以 A 相为例)....................................................................................... 23 1)有功功率偏差校正 ............................................................................................................. 24 2)有功功率增益调整 ............................................................................................................. 24 3)有功功率的防潜动 ............................................................................................................. 24 4)有功功率的小信号补偿...................................................................................................... 25 5)有功功率反向指示阈值 ...................................................................................................... 25 6)正向有功能量计算 ............................................................................................................. 25

LCS 652说明书

LCS 652说明书

LCS 652说明书
提前说明:
本说明书仅适用于LCS 652微机型保护测控装置。

请仔细阅读本说明书,并按照说明书的说明设置、测试和操作。

如有随机资料,请以随机资料为准。

为确保装置、人身安全,务必将装置的接地端GND可靠接地(PE)。

为防止装置损坏,严禁带电插拔装置各插件、触摸印制电路板上的芯片和器件。

请使用合格的测试仪器和设备对装置进行试验和检测。

本装置的设置缺省密码是:XXXX。

概述
LCS 652微机型保护测控装置(以下简称LCS 652)是在消化吸收国内外先进技术的基础上设计开发的用于110kV及以下电压等级
的保护测控一体化装置。

LCS 652采用了高端配置:高性能32位嵌入式单片机、高精度AD采样、大液晶人机界面、支持软件在线升级。

LCS 652高可靠性的继电保护功能与自动控制功能、完备的遥控与出口输出功能,可实现电力线路、变压器、高压电动机、电容器、分段母线的保护与测控。

环境条件
工作温度:-25℃-+70℃
贮存温度:-40℃-+85℃
相对湿度:5%-95%(产品内部不凝露,不结冰)
大气压力:70 kPa-106 kPa
海拔高度:<3000m
产品使用
适用于电力线路、变压器、电容器、高压电动机和分段母线的保护;灵敏接地方向保护可以实现分散的接地选线;装置可就地分散安装或集中组屏安装;特别适合于环网柜保护监控。

AD652

AD652
50mA
七、推荐工作条件: 总电源电压: 工作温度范围
八、典型应用连接图:
+VS~-VS 30V -55℃~+125℃
电子发烧友
电子发烧友
电子发烧友
五、封装形式及引线功能 1.封装形式
2.引线功能
电子发烧友
六、绝对最大额定值
总电源电压+VS~-VS
最大输出电流(开放基极输出)
放大器对地短路
存贮温度范围:陶瓷
-65℃~+15℃
PLCCL(塑封)
电子发烧友
L2652S/AD652S 电压频率转换器
一、特点: · .由内部系统时钟设置全范围频率(可达 2MHz) . 非常低的线性误差(1MHZFS 下 0.005%,2MHZFS 下 0.02%) . 无关键外部元件要求 . 精确 5V 基准电压 . 低飘移(≤25ppm/℃) . 双或单电源工作 . 电压或电流输入 . 有 MIL—STD—883 应允的形式可利用 二、概述: AD652S 同步电压频率转换器是一种精密的模拟一数字转换的大功率装配器件。100KHz 输出频率下仅 产生典型非线性度为 0.002%(最大 0.005%)。转换功能的固有单一性和宽范围时钟频率允许转换时间和分 辨力实现特殊应用下的最佳化。 AD652S 应用一种普通的电荷平衡技术的更新来实现转换功能,应用一种外部时钟来实现全范围输出 频率,而不是靠外部电容器的稳定来实现的。结果是一种更加稳定、更加线性的转换功能,在单路和多路 系统中都有重要的应用。 AD652S 可实现在—55℃—+125℃温度范围内工作。 三、等效电路图:
四、电特性 AD652(TA=+25℃,VS=±15V)
电子发烧友
  1. 1、下载文档前请自行甄别文档内容的完整性,平台不提供额外的编辑、内容补充、找答案等附加服务。
  2. 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
  3. 3、如文档侵犯您的权益,请联系客服反馈,我们会尽快为您处理(人工客服工作时间:9:00-18:30)。

AD6523/AD6524GSM Direct ConversionRadio Chip SetThe Othello chip set with each IC measuring only 4.4 mm meets current market demandsfor smaller phones.FEATURES•New ADI Superhomodyne ™Architecture (Direct Conversion Receiver)meets current and future market demands•Flexible and upgradable to support future generations of GSM phones and multiple applications•30-50 percent cost and space savings result in less expensive and smaller phones•RF platform suitable for multi-mode and/or software radio markets •Integrates single chip RF/Modulator/Baseband 28-TSSOP (AD6523) with separate synthesizer 20-TSSOP . Chip scale packaging available next year •Implemented in 0.6 um BiCMOS process •Virtual-IF ™transmitter loop •Multi-band operation•Ultra Fast Locking Fractional-N synthesizer for GPRS•Signal chain optimization by utilizing ADI’s systems experience, design and process technologyGSM DIRECT CONVERSION CHIP SET FEATURES BREAKTHROUGH RF TECHNHOLOGYAnalog Devices’ Othello,™a GSM (Global System for Mobile Communications) direct conversion radio chip set, features a revolutionary radio architecture that provides 30-50 percent savings in cost and size for the next generation of dual-band and triple-band GSM phones.Consisting of the AD6523 transceiver and the AD6524 synthesizer, Othello allows incoming signals to be “directly converted” to baseband,thus eliminating the need for IF (Intermediate Frequency) components. In addition, Othello's patented architecture provides two other signifi-cant performance benefits. First, the chip set enables 1,000 hours, or 1.5 months, of standby time for GSM cellular phones. Second, it pro-vides capabilties for data rates of 25-30 times than the 14.4 kbps of current GSM solutions. That allows next generation content, like web browsing,e-mail, games, and real-time video to be possible over cellular phones and GSM platforms.Audio Interface Processing Baseband RF © Analog Devices, Inc., 1999. All rights reserved. Trademarks and registered trademarks are the property of their respective companies.H3711-5-9/99OTHELLO TECHNOLOGY:Analog Devices’ Othello chip set solution is comprised of the AD6523 transceiver and the AD6524 synthesizer.• AD6523 Transceiver The AD6523 is a monolithic Zero-Intermediate Frequency (Zero-IF) transceiver that combines, on a single chip, all radio transmitter and receiver functions that are necessary to build a complete GSM,DCS1800, or PCS1900 mobile radio. It contains a complete translation loop modulator for directly modulating baseband signals onto a voltage con-trolled oscillator (VCO) as well as a complete direct conver-sion receiver for converting received signals directly to baseband without intermediate frequency conversions. The AD6523 is packaged in a 4.4 mm, 28 lead TSSOP .• AD6524 Synthesizer The AD6524 is a Multi-Band Frequency synthesizer that combines on a single chip, a Fractional-N synthesizer, a crystal oscillator, and four general purpose outputs.These functions are critical in the design of GSM, DCS1800,or PCS1900 mobile phones.The AD6524 is packaged in a 4.4 mm 20 lead TSSOP .Together, the AD6523 and the AD6524 can implement a com-plete dual band RF transceiver known as Analog Devices’Othello.NEW DIRECT CONVERSION ARCHITECTUREThe Othello chip set solution is based on Analog Devices’ new patent-pending direct conversion architecture and features a greatly simplified approach to traditional radio architecture. Direct conver-sion technology reduces cost,component count, and power consumption. At the same time,emerging standards such as EDGE (Enhanced Data GSM Environment), GPRS (General Packet Radio Service) and 3G are addressed.ADI’s architecture lowers manufacturing costs by eliminat-ing the need for intermediate frequency devices, the most expensive components of the radio. In addition, Othello is fully compliant with GSM standards and enables manufacturers to upgrade easily and adapt their products to muti-mode and multi-slot data applications.ANALOG DEVICES: A LEADER IN GSMAn established supplier of components and solutions to GSM handset manufacturers,Analog Devices has an incompara-ble track record of high-volume,low-cost manufacturing and delivery. The company’s mixed-signal processors and baseband converters are used in millions of GSM handsets worldwide. The Othello GSM direct conversion radio chip set represents another example of how Analog Devices continually develops new prod-ucts that meet the needs of the GSM market.ANALOG DEVICES IN COMMUNICATIONSAnalog Devices is recognized for its unparalleled technical capabili-ties in analog, digital, andmixed-signal processing used in RF signal processing, data conver-sion, interfaces, and total system design. The company develops and offers customers a wide range of innovative wireless and broad-band wired communications products including solutions for GSM; CDMA(Code Division Multiple Access); cellular base stations/software radio; RF and IF (intermediate frequency) circuits,and xDSL. The company is committed to supplying thecommunications industry with the highest performance solutions at the lowest possible cost.Othello was designed utilizing ADI’s systems experience, design, and process technology for signal chain optimization.SPECIFICATIONSAD6523Complete Dual BandTransmitter/Receiver includes:Translation Loop Direct VCO ModulatorProgrammable Phase Detector GainOn-chip Flittering of Tx ProductsZero-IF Direct Conversion ReceiverDifferential GSM Low Noise AmplifierIntegrated Active Rx Channel Select Low Pass Filters Programmable Gain Baseband AmplifiersBaseband InterfaceMultiplexed Differential I and Q Inputs/OutputsAuxiliary/Control-Signals Through Serial InterfaceOn-chip Low Dropout Voltage Regulator2.9V to 5.5V Direct Battery Voltage InputOutput to Supply All On-Chip Functions28-Lead TSSOP 1.65 V – 2.95 V Digital InterfaceDirect Interface to AD6524Multi-band Synthesizer AD6524Fractional-N SynthesizerOperation to 1.6 GHz Sigma-Delta Modulator—Eliminates Fractional Spurs Programmable Phase Detector GainHigh-Speed Channel Switching for Data ServicesCrystal OscillatorStandard 13 MHz GSM Operating FrequencyFrequency Doubler for Fractional-N SynthesizerCourse Tuning Function for Fast Startup TimeLow Operating CurrentGeneral Purpose OutputsFour CMOS ouputs for radio switching 10 mA source or sink currentStandard Three Wire Serial Interface 20-Lead TSSOP 2.7-3.3 V Operation 1.65V – 2.95 V Digital InterfaceDirect Interface to AD6523 Zero-IF Transceiver。

相关文档
最新文档