CD4023 CMOS 三3输入与非门

TL F 5956CD4023BM CD4023BC Buffered Triple 3-Input NAND Gate CD4025BM CD4025BC Buffered Triple 3-Input NOR GateFebruary 1988CD4023BM CD4023BCBuffered Triple 3-Input NAND Gate CD4025BM CD4025BCBuffered Triple 3-Input NOR GateGeneral DescriptionThese triple gates are monolithic complementary MOS (CMOS)integrated circuits constructed with N-and P-chan-nel enhancement mode transistors They have equal source and sink current capabilities and conform to standard B se-ries output drive The devices also have buffered outputs which improve transfer characteristics by providing very high gain All inputs are protected against static discharge with diodes to V DD and V SSFeaturesY Wide supply voltage range 3 0V to 15V Y High noise immunity 0 45V DD (typ )YLow power TTL fan out of 2driving 74L compatibility or 1driving 74LS Y 5V–10V–15V parametric ratings Y Symmetrical output characteristicsYMaximum input leakage 1m A at 15V over full temperature rangeConnection DiagramsCD4023BM CD4023BC Dual-In-Line PackageTL F 5956–1Top ViewCD4025BM CD4025BC Dual-In-Line PackageTL F 5956–2Top ViewOrder Number CD4023B or CD4025BC 1995National Semiconductor Corporation RRD-B30M105 Printed in U S AAbsolute Maximum Ratings (Notes 1 2)If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications DC Supply Voltage (V DD )b 0 5V DC to a 18V DC Input Voltage (V IN )b 0 5V DC to V DD a 0 5V DCStorage Temp Range (T S )b 65 C to a 150 CPower Dissipation (P D )Dual-In-Line 700mW Small Outline 500mW Lead Temperature (T L )(Soldering 10seconds)260 CRecommended Operating ConditionsDC Supply Voltage (V DD )5V DC to 15V DC Input Voltage (V IN )0V DC to V DD V DCOperating Temperature Range (T A )CD4023BM CD4025BM b 55 C to a 125 C CD4023BC CD4025BCb 40 C to a 85 CDC Electrical Characteristics CD4023BM CD4025BM (Note 2)Symbol ParameterConditionsb 55 Ca 25 Ca 125 CUnits Min Typ Min Typ Max Min Max I DDQuiescent Device Current V DD e 5V0 250 0040 257 5m A V DD e 10V 0 50 0050 515m A V DD e 15V 1 00 0061 030m A V OLLow Level Output Voltage V DD e 5V0 0500 050 05V V DD e 10V 0 0500 050 05V V DD e 15V 0 050 050 05V V OHHigh Level Output Voltage V DD e 5V4 954 9554 95V V DD e 10V 9 959 95109 95V V DD e 15V 14 9514 951514 95VV ILLow Level Input VoltageV DD e 5V V O e 4 5V 1 521 51 5V V DD e 10V V O e 9 0V l I O l k 1m A3 043 03 0V V DD e 15V V O e 13 5V (4 064 04 0V V IHHigh Level Input VoltageV DD e 5V V O e 0 5V 3 53 533 5V V DD e 10V V O e 1 0V lI O l k 1m A7 07 067 0V V DD e 15V V O e 1 5V(11 011 0911 0V I OLLow Level Output Current V DD e 5V V O e 0 4V 0 640 510 880 36mA (Note 3)V DD e 10V V O e 0 5V1 61 32 20 90mA V DD e 15V V O e 1 5V4 23 482 4mA I OHHigh Level Output Current V DD e 5V V O e 4 6V b 0 64b 0 51b 0 88b 0 36mA (Note 3)V DD e 10V V O e 9 5Vb 1 6b 1 3b 2 2b 0 90mA V DD e 15V V O e 13 5V b 4 2b 3 4b 8b 2 4mAI INInput CurrentV DD e 15V V IN e 0V b 0 10b 10b 5b 0 10b 1 0m AV DD e 15V V IN e 15V0 1010b 50 101 0m ASchematic DiagramCD4023BC CD4023BMTL F 5956–3Device Shown All Inputs Protectedby Standard CMOS Input Protection Circuit2DC Electrical Characteristics CD4023BC CD4025BC (Note 2)Symbol ParameterConditionsb 40 Ca 25 Ca 85 CUnits Min Typ Min Typ Max Min Max I DDQuiescent Device Current V DD e 5V1 00 0041 07 5m A V DD e 10V2 00 0052 015m A V DD e 15V 4 00 0064 030m A V OLLow Level Output Voltage V DD e 5V0 0500 050 05V V DD e 10V 0 0500 050 05V V DD e 15V 0 050 050 05V V OHHigh Level Output Voltage V DD e 5V4 954 9554 95V V DD e 10V 9 959 95109 95V V DD e 15V 14 9514 951514 95VV ILLow Level Input VoltageV DD e 5V V O e 4 5V 1 521 51 5V V DD e 10V V O e 9 0V l I O l k 1m A3 043 03 0V V DD e 15V V O e 13 5V (4 064 04 0V V IHHigh Level Input VoltageV DD e 5V V O e 0 5V 3 53 533 5V V DD e 10V V O e 1 0V l I O lk 1m A7 07 067 0V V DD e 15V V O e 1 5V(11 011 0911 0V I OLLow Level Output Current V DD e 5V V O e 0 4V 0 520 440 880 36mA (Note 3)V DD e 10V V O e 0 5V1 31 12 20 90mA V DD e 15V V O e 1 5V3 63 082 4mA I OHHigh Level Output Current V DD e 5V V O e 4 6V b 0 52b 0 44b 0 88b 0 36mA (Note 3)V DD e 10V V O e 9 5Vb 1 3b 1 1b 2 2b 0 90mA V DD e 15V V O e 13 5V b 3 6b 3 0b 8b 2 4mAI INInput CurrentV DD e 15V V IN e 0V b 0 3b 10b 5b 0 3b 1 0m AV DD e 15V V IN e 15V0 310b 50 31 0m ANote 1 ‘‘Absolute Maximum Ratings’’are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits The table of ‘‘Recommended Operating Conditions’’and ‘‘Electrical Characteristics’’provides conditions for actual device operationNote 2 V SS e 0V unless otherwise specified Note 3 I OH and I OL are tested one output at a timeSchematic DiagramCD4025BM CD4025BCTL F 5956–4Device Shown All Inputs Protectedby Standard CMOS Input Protection Circuit3AC Electrical Characteristics T A e25 C C L e50pF R L e200k unless otherwise specifiedCD4023BC CD4025BCSymbol Parameter Conditions CD4023BM CD4025BM UnitsMin Typ Max Min Typ Maxt PHL Propagation Delay High-to-Low Level V DD e5V130250130250nsV DD e10V6010060100nsV DD e15V40704070nst PLH Propagation Delay Low-to-High Level V DD e5V110250120250nsV DD e10V5010060100nsV DD e15V35704070nst THL Transition Time V DD e5V9020090200ns t TLH V DD e10V5010050100nsV DD e15V40804080ns C IN Average Input Capacitance Any Input57 557 5pF C PD Power Dissipation Capacity(Note4)Any Gate1717pF AC Parameters are guaranteed by DC correlated testingNote4 C PD determines the no load AC power consumption of any CMOS device For complete explanation see54C 74C Family Characteristics Application Note AN-904Physical Dimensions inches(millimeters)Ceramic Dual-In-Line Package(J)Order Number CD4023BMJ CD4023BCJ CD4025BMJ or CD4025BCJNS Package Number J14A5C D 4023B M C D 4023B C B u f f e r e d T r i p l e 3-I n p u t N A N D G a t e C D 4025B M C D 4025B C B u f f e r e d T r i p l e 3-I n p u t N O R G a t ePhysical Dimensions inches (millimeters)(Continued)Molded Dual-In-Line Package (N)Order Number CD4023BMN CD4023BCN CD4025BMN or CD4025BCNNS Package Number N14ALIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or 2 A critical component is any component of a life systems which (a)are intended for surgical implant support device or system whose failure to perform can into the body or (b)support or sustain life and whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system or to affect its safety or with instructions for use provided in the labeling can effectivenessbe reasonably expected to result in a significant injury to the userNational Semiconductor National Semiconductor National Semiconductor National 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