半导体制造技术
半导体的生产工艺流程

半导体的生产工艺流程1.晶圆制备:晶圆制备是半导体生产的第一步,通常从硅片开始。
首先,取一块纯度高达99.9999%的单晶硅,然后经过脱氧、精炼、单晶生长和棒状晶圆切割等步骤,制备出硅片。
这些步骤的目的是获得高纯度、无杂质的单晶硅片。
2.晶圆加工:晶圆加工是将硅片加工成具有特定电子器件的过程。
首先,通过化学机械抛光(CMP)去除硅片上的表面缺陷。
然后,利用光刻技术将特定图案投射到硅片上,并使用光刻胶保护未被刻蚀的区域。
接下来,使用等离子刻蚀技术去除未被保护的硅片区域。
这些步骤的目的是在硅片上形成特定的电子器件结构。
3.器件制造:器件制造是将晶圆上的电子器件形成完整的制造流程。
首先,通过高温扩散或离子注入方法向硅片中掺杂特定的杂质,以形成PN结。
然后,使用化学气相沉积技术在硅片表面沉积氧化层,形成绝缘层。
接下来,使用物理气相沉积技术沉积金属薄膜,形成电压、电流等电子元件。
这些步骤的目的是在硅片上形成具有特定功能的电子器件。
4.封装测试:封装测试是将器件封装成实际可使用的电子产品。
首先,将器件倒装到封装盒中,并连接到封装基板上。
然后,通过线缆或焊接技术将封装基板连接到主板或其他电路板上。
接下来,进行电极焊接、塑料封装封装,形成具有特定外形尺寸和保护功能的半导体芯片。
最后,对封装好的半导体芯片进行功能性测试和质量检查,以确保其性能和可靠性。
总结起来,半导体的生产工艺流程包括晶圆制备、晶圆加工、器件制造和封装测试几个主要步骤。
这些步骤的有机组合使得我们能够生产出高性能、高效能的半导体器件,广泛应用于电子产品和信息技术领域。
半导体制造工艺技术概述

铝淀积
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蒸铝的台阶覆盖
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难熔阻挡金属(RBM)溅射
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塞状钨通孔系统
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硅化
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现代金属化系统
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铜金属化
• 铝的缺点
– 电阻比铜大,在亚微米工艺下表现明显 – 电迁徙问题
• 铜的优点
– 导电性能好 – 提高抗电迁徙特性
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双大马士革工艺
49
功率铜
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组装
晶圆结构
52
安装与键合
• 氧化工艺
– 干法:在纯净干燥的氧气中加热,速度缓慢,质量很高,用于器件 – 湿法:在氧气混合水蒸气中加热,速度加快,质量降低,用于场氧化层 – 淀积:在非硅材料上形成二氧化硅,通过气态硅化合物和气态氧化剂反
应值得,用于两层导体之间的绝缘层或保护层
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氧化炉简图
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氧化物去除
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氧化物刻蚀
• 湿法刻蚀
– 使用稀释的氢氟酸溶液
• 干法刻蚀
– 反应离子刻蚀 (RIE) – 等离子刻蚀 – 化学气相刻蚀
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反应离子刻蚀
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对晶圆表面形貌的影响
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氧化分凝机制
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杂质增强氧化效应
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硅的局部氧化 (LOCOS)
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Kooi效应
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扩散和离子注入
扩散工艺
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磷扩散工艺
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横向扩散
30
改变扩散速率的机制
中国芯技术系列
半导体制造工艺技术概述
技术创新,变革未来
提纲
• 硅制造 • 光刻技术 • 氧化物生长和去除 • 扩散和离子注入 • 硅淀积和刻蚀 • 金属化 • 组装
半导体行业的智能制造了解半导体行业的智能制造技术和趋势

半导体行业的智能制造了解半导体行业的智能制造技术和趋势半导体行业的智能制造:了解半导体行业的智能制造技术和趋势随着科技的不断发展,智能制造已经成为各个行业的发展趋势,其中半导体行业也不例外。
半导体作为信息时代的基石,其制造技术的先进程度对整个行业的发展起到至关重要的作用。
本文将介绍半导体行业的智能制造技术和当前的趋势。
一、智能制造在半导体行业的应用智能制造技术在半导体行业的应用领域涵盖生产、研发以及供应链等方面,主要体现在以下几个方面:1. 生产领域在半导体生产的整个过程中,智能制造技术可以提高生产效率、降低成本和提升产品质量。
通过引入自动化设备和机器人技术,半导体厂商可以实现生产流程的智能化管理,减少人力资源的浪费,提高生产线的运行效率。
2. 研发领域智能制造在半导体研发中的应用主要体现在缩短研发周期、提高研发效率和优化设计流程等方面。
通过引入虚拟仿真技术和数据分析算法,半导体研发团队可以更加快速地验证和优化设计方案,降低研发成本,提高产品的设计质量。
3. 供应链管理半导体行业的供应链十分庞大复杂,包括原材料采购、生产计划、库存管理等环节。
智能制造技术可以通过数据分析和预测算法,提高供应链的可视化程度和反应速度,降低库存压力,提高供应链的灵活性和准确性。
二、半导体行业智能制造的趋势1. 自动化升级半导体行业智能制造的趋势之一是自动化升级。
随着机器人技术和自动化设备的不断发展,越来越多的传统工序可以由机器代替人工操作,从而提高生产效率和降低成本。
例如,自动化的芯片组装设备可以实现高速、高精度的芯片组装,大幅提高生产效率。
2. 数据分析与人工智能数据分析和人工智能技术在半导体行业的应用也是当前的趋势之一。
通过收集和分析海量的生产数据和设备数据,可以实现对生产过程的实时监控和预测故障的能力。
同时,人工智能技术可以应用于半导体设备的优化和智能控制,提高生产效率和设备可靠性。
3. 智能供应链管理供应链管理是半导体行业智能制造的重要环节,当前的趋势是通过智能化的供应链管理系统,实现对供应链各个环节的实时监控和管理。
半导体制造技术

半导体制造技术
半导体制造技术是指以半导体材料为基础,利用先进的设备、工艺和测试技术,在晶圆上制作各种尺寸、形状和功能的集成电路(IC)元件。
半导体制造技术包括晶圆生产、片上集成、封装、测试等一系列步骤。
晶圆生产技术是半导体制造的核心步骤,其目的是在晶圆表面形成一层导电层,用于在其表面制作微纳米尺寸的元件及连接线路。
常用的晶圆生产技术有光刻、电镀、气相沉积、激光刻蚀、无损整形、金属化学气相沉积等。
片上集成技术是将器件与线路集成在一个晶片上,实现信号传输及功能实现。
目前,在片上集成中使用的技术主要有光刻、激光刻蚀和激光加工等。
封装技术是指将晶片封装到一个容器中,以便将其与外部电路和环境完全隔离,并保护其内部结构。
一般来说,封装技术可以分为焊接、固化、涂覆、压合和滴胶等。
测试技术是检查半导体元件及集成电路性能的手段,如功耗测试、性能测试、动态测试、稳态测试等。
半导体制造技术导论萧宏台译本

半导体制造技术导论萧宏台译本【最新版】目录1.半导体制造技术的概述2.半导体材料的特性3.半导体制造过程的步骤4.半导体制造技术的发展趋势正文半导体制造技术是现代电子产业的基石,它不仅影响到各种电子产品的性能和质量,也关系到整个电子产业的发展。
半导体制造技术的重要性不言而喻,然而,对于非专业人士来说,半导体制造技术可能显得有些神秘和复杂。
因此,本文将从半导体制造技术的概述、半导体材料的特性、半导体制造过程的步骤以及半导体制造技术的发展趋势等方面进行介绍,以期帮助读者更好地理解半导体制造技术。
首先,我们来了解一下半导体制造技术的概述。
半导体制造技术是指将半导体材料通过一系列的物理、化学和光电过程,制造成具有特定功能和性能的半导体器件和集成电路的技术。
半导体制造技术的核心是半导体材料,它是一种具有特殊电导率特性的材料,其导电性能介于导体和绝缘体之间。
半导体材料的这种特性,使得它成为了制造电子器件的理想材料。
接下来,我们来看看半导体材料的特性。
半导体材料的特性主要取决于其能带结构,即电子在半导体内的能量分布。
半导体材料的能带结构决定了其导电性能,也决定了其对光、热等外部条件的敏感性。
半导体材料的另一个重要特性是其掺杂性,即在半导体材料中掺杂其他元素可以改变其导电性能。
通过掺杂,我们可以制造出 p 型半导体和 n 型半导体,这是半导体制造技术的重要基础。
然后,我们来介绍一下半导体制造过程的步骤。
半导体制造过程可以分为两大类,一类是前道工艺,主要是制造出半导体晶圆;另一类是后道工艺,主要是将半导体晶圆加工成具体的半导体器件和集成电路。
前道工艺的主要步骤包括硅片制备、清洗、氧化、光刻、刻蚀、离子注入等;后道工艺的主要步骤包括薄膜沉积、金属化、互连、封装等。
最后,我们来谈谈半导体制造技术的发展趋势。
随着科技的不断进步,半导体制造技术也在不断发展。
未来的半导体制造技术将会更加注重微型化、集成化和智能化,这需要我们开发出新的材料、设备和工艺。
半导体制造技术导论萧宏台译本

半导体制造技术导论萧宏台译本
摘要:
一、半导体制造技术的发展与重要性
1.半导体产业的迅速发展
2.半导体技术在现代生活中的应用
3.我国半导体制造技术的现状及挑战
二、半导体制造的基本过程
1.晶圆制备
2.薄膜沉积
3.光刻技术
4.离子注入
5.金属沉积与电镀
6.化学机械抛光
7.晶圆检测与封装
三、半导体制造技术的创新与趋势
1.制程技术的进步
2.新材料的应用
3.三维集成电路技术
4.纳米制造技术
5.绿色制造与可持续发展
四、我国半导体制造技术的发展战略与政策支持
1.提高自主研发能力
2.培养专业人才
3.加强产业链协同创新
4.政策扶持与资金投入
正文:
半导体制造技术导论萧宏台译本,为我们详细介绍了半导体制造技术的发展与重要性、基本过程以及创新与趋势。
半导体产业在全球范围内迅速发展,广泛应用于现代信息、通信、消费电子等领域。
然而,我国半导体制造技术相较于国际先进水平仍有一定差距,面临诸多挑战。
半导体制造的基本过程包括晶圆制备、薄膜沉积、光刻技术、离子注入、金属沉积与电镀、化学机械抛光以及晶圆检测与封装等环节。
这些环节相互关联,共同决定了半导体的性能、功耗以及成本。
随着制程技术的不断进步,半导体制造过程变得越来越复杂,对工艺要求也越来越高。
半导体制造技术ppt

半导体制造的环保与安全
05
采用低能耗的设备、优化生产工艺和强化能源管理,以降低能源消耗。
节能设计
利用废水回收系统,回收利用生产过程中产生的废水,减少用水量。
废水回收
采用低排放的设备、实施废气处理技术,以减少废气排放。
废气减排
半导体制造过程中的环保措施
严格执行国家和地方的安全法规
安全培训
安全检查
半导体制造过程的安全规范
将废弃物按照不同的类别进行收集和处理,以便于回收利用。
废弃物处理和回收利用
分类收集和处理
利用回收技术将废弃物进行处理,以回收利用资源。
回收利用
按照国家和地方的规定,将无法回收利用的废弃物进行合法处理,以减少对环境的污染。
废弃物的合法处理
未来半导体制造技术的前景展望
06
新材料
随着人工智能技术的发展,越来越多的半导体制造设备具备了智能化控制和自主学习的能力。
半导体制造设备的最新发展
更高效的生产线
为了提高生产效率和降低成本,各半导体制造厂家正在致力于改进生产线,提高设备的联动性和生产能力。
更先进的材料和工艺
随着科学技术的发展,越来越多的先进材料和工艺被应用于半导体制造中,如石墨烯、碳纳米管等材料以及更为精细的制程工艺。
薄膜沉积
在晶圆表面沉积所需材料,如半导体、绝缘体或导体等。
封装测试
将芯片封装并测试其性能,以确保其满足要求。
半导体制造的基本步骤
原材料准备
晶圆制备
薄膜沉积
刻蚀工艺
离子注入
封装测试
各步骤中的主要技术
制造工艺的优化
通过对制造工艺参数进行调整和完善,提高产品的质量和产量。
制造工艺的改进
半导体制造技术复习总结

半导体制造技术复习总结半导体制造技术复习总结第⼀章半导体产业介绍1、集成电路制造的不同阶段:硅⽚制备、硅⽚制造、硅⽚测试/拣选、装配与封装、终测;2、硅⽚制造:清洗、成膜、光刻、刻蚀、掺杂;3、半导体趋势:提⾼芯⽚性能、提⾼芯⽚可靠性、降低芯⽚价格;4、摩尔定律:⼀个芯⽚上的晶体管数量⼤约每18个⽉翻⼀倍。
5、半导体趋势:①提⾼芯⽚性能:a关键尺⼨(CD)-等⽐例缩⼩(Scale down)b每块芯⽚上的元件数-更多 c 功耗-更⼩②提⾼芯⽚可靠性: a⽆颗粒净化间的使⽤ b控制化学试剂纯度c分析制造⼯艺 d硅⽚检测和微芯⽚测试e芯⽚制造商成⽴联盟以提⾼系统可靠性③降低芯⽚价格:a.50年下降1亿倍 b减少特征尺⼨+增加硅⽚直径c半导体市场的⼤幅度增长(规模经济)第⼆章半导体材料特性6、最常见、最重要半导体材料-硅:a.硅的丰裕度 b.更⾼的熔化温度允许更宽的⼯艺容限c.更宽的⼯作温度范围d.氧化硅的⾃然⽣成7、GaAs的优点:a.⽐硅更⾼的电⼦迁移率; b.减少寄⽣电容和信号损耗; c.集成电路的速度⽐硅制成的电路更快; d.材料电阻率更⼤,在GaAs衬底上制造的半导体器件之间很容易实现隔离,不会产⽣电学性能的损失;e.⽐硅有更⾼的抗辐射性能。
GaAs的缺点: a.缺乏天然氧化物;b.材料的脆性; c.由于镓的相对匮乏和提纯⼯艺中的能量消耗,GaAs的成本相当于硅的10倍; d.砷的剧毒性需要在设备、⼯艺和废物清除设施中特别控制。
第三章器件技术8、等⽐例缩⼩:所有尺⼨和电压都必须在通过设计模型应⽤时统⼀缩⼩。
第四章硅和硅⽚制备9、⽤来做芯⽚的⾼纯硅称为半导体级硅(semiconductor-grade silicon, SGS)或电⼦级硅西门⼦⼯艺:1.⽤碳加热硅⽯来制备冶⾦级硅SiC(s)+SiO2(s) Si(l)+SIO(g)+CO(g)2.将冶⾦级硅提纯以⽣成三氯硅烷Si(s)+3HCl(g) SiHCl3(g)+H2(g)3.通过三氯硅烷和氢⽓反应来⽣成SGS SiHCl3(g)+H2(g) Si(s)+3HCl(g)10、单晶硅⽣长:把多晶块转变成⼀个⼤单晶,并给予正确的定向和适量的N型或P型掺杂,叫做晶体⽣长。
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Semiconductor Manufacturing Technology半导体制造技术Instructor’s ManualMichael QuirkJulian SerdaCopyright Prentice HallTable of Contents目录OverviewI. Chapter1. Semiconductor industry overview2. Semiconductor materials3. Device technologies—IC families4. Silicon and wafer preparation5. Chemicals in the industry6. Contamination control7. Process metrology8. Process gas controls9. IC fabrication overview10. Oxidation11. Deposition12. Metallization13. Photoresist14. Exposure15. Develop16. Etch17. Ion implant18. Polish19. Test20. Assembly and packagingII. Answers to End-of-Chapter Review QuestionsIII. Test Bank (supplied on diskette)IV. Chapter illustrations, tables, bulleted lists and major topics (supplied on CD-ROM)Notes to Instructors:1)The chapter overview provides a concise summary of the main topics in each chapter.2)The correct answer for each test bank question is highlighted in bold. Test bankquestions are based on the end-of-chapter questions. If a student studies the end-of-chapter questions (which are linked to the italicized words in each chapter), then they will be successful on the test bank questions.2Chapter 1Introduction to the Semiconductor Industry Die:管芯 defective:有缺陷的Development of an Industry•The roots of the electronic industry are based on the vacuum tube and early use of silicon for signal transmission prior to World War II. The first electronic computer, the ENIAC, wasdeveloped at the University of Pennsylvania during World War II.•William Shockley, John Bardeen and Walter Brattain invented the solid-state transistor at Bell Telephone Laboratories on December 16, 1947. The semiconductor industry grew rapidly in the 1950s to commercialize the new transistor technology, with many early pioneers working inSilicon Valley in Northern California.Circuit Integration•The first integrated circuit, or IC, was independently co-invented by Jack Kilby at Texas Instruments and Robert Noyce at Fairchild Semiconductor in 1959. An IC integrates multiple electronic components on one substrate of silicon.•Circuit integration eras are: small scale integration (SSI) with 2 - 50 components, medium scale integration (MSI) with 50 – 5k components, large scale integration (LSI) with 5k to 100kcomponents, very large scale integration (VLSI) with 100k to 1M components, and ultra large scale integration (ULSI) with > 1M components.1IC Fabrication•Chips (or die) are fabricated on a thin slice of silicon, known as a wafer (or substrate). Wafers are fabricated in a facility known as a wafer fab, or simply fab.•The five stages of IC fabrication are:Wafer preparation: silicon is purified and prepared into wafers.Wafer fabrication: microchips are fabricated in a wafer fab by either a merchant chip supplier, captive chip producer, fabless company or foundry.Wafer test: Each individual die is probed and electrically tested to sort for good or bad chips.Assembly and packaging: Each individual die is assembled into its electronic package.Final test: Each packaged IC undergoes final electrical test.•Key semiconductor trends are:Increase in chip performance through reduced critical dimensions (CD), more components per chip (Moore’s law, which predicts the doubling of components every 18-24 months) andreduced power consumption.Increase in chip reliability during usage.Reduction in chip price, with an estimated price reduction of 100 million times for the 50 years prior to 1996.The Electronic Era•The 1950s saw the development of many different types of transistor technology, and lead to the development of the silicon age.•The 1960s were an era of process development to begin the integration of ICs, with many new chip-manufacturing companies.•The 1970s were the era of medium-scale integration and saw increased competition in the industry, the development of the microprocessor and the development of equipment technology. •The 1980s introduced automation into the wafer fab and improvements in manufacturing efficiency and product quality.•The 1990s were the ULSI integration era with the volume production of a wide range of ICs with sub-micron geometries.Career paths•There are a wide range of career paths in semiconductor manufacturing, including technician, engineer and management.2Chapter 2 Characteristics of Semiconductor MaterialsAtomic Structure•The atomic model has three types of particles: neutral neutrons(不带电的中子), positively charged protons(带正电的质子)in the nucleus and negatively charged electrons(带负电的核外电子) that orbit the nucleus. Outermost electrons are in the valence shell, and influence the chemical and physical properties of the atom. Ions form when an atom gains or loses one or more electrons.The Periodic Table•The periodic table lists all known elements. The group number of the periodic table represents the number of valence shell electrons of the element. We are primarily concerned with group numbers IA through VIIIA.•Ionic bonds are formed when valence shell electrons are transferred from the atoms of one element to another. Unstable atoms (e.g., group VIIIA atoms because they lack one electron) easily form ionic bonds.•Covalent bonds have atoms of different elements that share valence shell electrons.3Classifying Materials•There are three difference classes of materials:ConductorsInsulatorsSemiconductors•Conductor materials have low resistance to current flow, such as copper. Insulators have high resistance to current flow. Capacitance is the storage of electrical charge on two conductive plates separated by a dielectric material. The quality of the insulation material between the plates is the dielectric constant. Semiconductor materials can function as either a conductor or insulator.Silicon•Silicon is an elemental semiconductor material because of four valence shell electrons. It occurs in nature as silica and is refined and purified to make wafers.•Pure silicon is intrinsic silicon. The silicon atoms bond together in covalent bonds, which defines many of silicon’s properties. Silicon atoms bond together in set, repeatable patterns, referred to asa crystal.•Germanium was the first semiconductor material used to make chips, but it was soon replaced by silicon. The reasons for this change are:Abundance of siliconHigher melting temperature for wider processing rangeWide temperature range during semiconductor usageNatural growth of silicon dioxide•Silicon dioxide (SiO2) is a high quality, stable electrical insulator material that also serves as a good chemical barrier to protect silicon from external contaminants. The ability to grow stable, thin SiO2 is fundamental to the fabrication of Metal-Oxide-Semiconductor (MOS) devices. •Doping increases silicon conductivity by adding small amounts of other elements. Common dopant elements are from trivalent, p-type Group IIIA (boron) and pentavalent, n-type Group VA (phosphorus, arsenic and antimony).•It is the junction between the n-type and p-type doped regions (referred to as a pn junction) that permit silicon to function as a semiconductor.4Alternative Semiconductor Materials•The alternative semiconductor materials are primarily the compound semiconductors. They are formed from Group IIIA and Group VA (referred to as III-V compounds). An example is gallium arsenide (GaAs).•Some alternative semiconductors come from Group IIA and VIA, referred to as II-VI compounds. •GaAs is the most common III-V compound semiconductor material. GaAs ICs have greater electron mobility, and therefore are faster than ICs made with silicon. GaAs ICs also have higher radiation hardness than silicon, which is better for space and military applications. The primary disadvantage of GaAs is the lack of a natural oxide.5Chapter 3Device TechnologiesCircuit Types•There are two basic types of circuits: analog and digital. Analog circuits have electrical data that varies continuously over a range of voltage, current and power values. Digital circuits have operating signals that vary about two distinct voltage levels – a high and a low.Passive Component Structures•Passive components such as resistors and capacitors conduct electrical current regardless of how the component is connected. IC resistors are a passive component. They can have unwanted resistance known as parasitic resistance. IC capacitor structures can also have unintentional capacitanceActive Component Structures•Active components, such as diodes and transistors can be used to control the direction of current flow. PN junction diodes are formed when there is a region of n-type semiconductor adjacent to a region of p-type semiconductor. A difference in charge at the pn junction creates a depletion region that results in a barrier voltage that must be overcome before a diode can be operated. A bias voltage can be configured to have a reverse bias, with little or no conduction through the diode, or with a forward bias, which permits current flow.•The bipolar junction transistor (BJT) has three electrodes and two pn junctions. A BJT is configured as an npn or pnp transistor and biased for conduction mode. It is a current-amplifying device.6• A schottky diode is formed when metal is brought in contact with a lightly doped n-type semiconductor material. This diode is used in faster and more power efficient BJT circuits.•The field-effect transistor (FET), a voltage-amplifying device, is more compact and power efficient than BJT devices. A thin gate oxide located between the other two electrodes of the transistor insulates the gate on the MOSFET. There are two categories of MOSFETs, nMOS (n-channel) and pMOS (p-channel), each which is defined by its majority current carriers. There is a biasing scheme for operating each type of MOSFET in conduction mode.•For many years, nMOS transistors have been the choice of most IC manufacturers. CMOS, with both nMOS and pMOS transistors in the same IC, has been the most popular device technology since the early 1980s.•BiCMOS technology makes use of the best features of both CMOS and bipolar technology in the same IC device.•Another way to categorize FETs is in terms of enhancement mode and depletion mode. The major different is in the way the channels are doped: enhancement-mode channels are doped opposite in polarity to the source and drain regions, whereas depletion mode channels are doped the same as their respective source and drain regions.Latchup in CMOS Devices•Parasitic transistors can create a latchup condition(???????) in CMOS ICs that causes transistors to unintentionally(无心的) turn on. To control latchup, an epitaxial layer is grown on the wafer surface and an isolation barrier(隔离阻障)is placed between the transistors. An isolation layer can also be buried deep below the transistors.Integrated Circuit Productsz There are a wide range of semiconductor ICs found in electrical and electronic products. This includes the linear IC family, which operates primarily with anal3og circuit applications, and the digital IC family, which includes devices that operate with binary bits of data signals.7Chapter 4Silicon and Wafer Preparation8z Semiconductor-Grade Silicon•The highly refined silicon used for wafer fabrication is termed semiconductor-grade silicon (SGS), and sometimes referred to as electronic-grade silicon. The ultra-high purity of semiconductor-grade silicon is obtained from a multi-step process referred to as the Siemens process.Crystal Structure• A crystal is a solid material with an ordered, 3-dimensional pattern over a long range. This is different from an amorphous material that lacks a repetitive structure.•The unit cell is the most fundamental entity for the long-range order found in crystals. The silicon unit cell is a face-centered cubic diamond structure. Unit cells can be organized in a non-regular arrangement, known as a polycrystal. A monocrystal are neatly arranged unit cells.Crystal Orientation•The orientation of unit cells in a crystal is described by a set of numbers known as Miller indices.The most common crystal planes on a wafer are (100), (110), and (111). Wafers with a (100) crystal plane orientation are most common for MOS devices, whereas (111) is most common for bipolar devices.Monocrystal Silicon Growth•Silicon monocrystal ingots are grown with the Czochralski (CZ) method to achieve the correct crystal orientation and doping. A CZ crystal puller is used to grow the silicon ingots. Chunks of silicon are heated in a crucible in the furnace of the puller, while a perfect silicon crystal seed is used to start the new crystal structure.• A pull process serves to precisely replicate the seed structure. The main parameters during the ingot growth are pull rate and crystal rotation. More homogeneous crystals are achieved with a magnetic field around the silicon melt, known as magnetic CZ.•Dopant material is added to the melt to dope the silicon ingot to the desired electrical resistivity.Impurities are controlled during ingot growth. A float-zone crystal growth method is used toachieve high-purity silicon with lower oxygen content.•Large-diameter ingots are grown today, with a transition underway to produce 300-mm ingot diameters. There are cost benefits for larger diameter wafers, including more die produced on a single wafer.Crystal Defects in Silicon•Crystal defects are interruptions in the repetitive nature of the unit cell. Defect density is the number of defects per square centimeter of wafer surface.•Three general types of crystal defects are: 1) point defects, 2) dislocations, and 3) gross defects.Point defects are vacancies (or voids), interstitial (an atom located in a void) and Frenkel defects, where an atom leaves its lattice site and positions itself in a void. A form of dislocation is astacking fault, which is due to layer stacking errors. Oxygen-induced stacking faults are induced following thermal oxidation. Gross defects are related to the crystal structure (often occurring during crystal growth).Wafer Preparation•The cylindrical, single-crystal ingot undergoes a series of process steps to create wafers, including machining operations, chemical operations, surface polishing and quality checks.•The first wafer preparation steps are the shaping operations: end removal, diameter grinding, and wafer flat or notch. Once these are complete, the ingot undergoes wafer slicing, followed by wafer lapping to remove mechanical damage and an edge contour. Wafer etching is done to chemically remove damage and contamination, followed by polishing. The final steps are cleaning, wafer evaluation and packaging.Quality Measures•Wafer suppliers must produce wafers to stringent quality requirements, including: Physical dimensions: actual dimensions of the wafer (e.g., thickness, etc.).Flatness: linear thickness variation across the wafer.Microroughness: peaks and valleys found on the wafer surface.Oxygen content: excessive oxygen can affect mechanical and electrical properties.Crystal defects: must be minimized for optimum wafer quality.Particles: controlled to minimize yield loss during wafer fabrication.Bulk resistivity(电阻系数): uniform resistivity from doping during crystal growth is critical. Epitaxial Layer•An epitaxial layer (or epi layer) is grown on the wafer surface to achieve the same single crystal structure of the wafer with control over doping type of the epi layer. Epitaxy minimizes latch-up problems as device geometries continue to shrink.Chapter 5Chemicals in Semiconductor FabricationEquipment Service Chase Production BayChemical Supply Room Chemical Distribution Center Holding tank Chemical drumsProcess equipmentControl unit Pump Filter Raised and perforated floorElectronic control cablesSupply air ductDual-wall piping for leak confinement PumpFilterChemical control and leak detection Valve boxes for leak containment Exhaust air ductStates of Matter• Matter in the universe exists in 3 basic states (宇宙万物存在着三种基本形态): solid, liquid andgas. A fourth state is plasma.Properties of Materials• Material properties are the physical and chemical characteristics that describe its unique identity.• Different properties for chemicals in semiconductor manufacturing are: temperature, pressure andvacuum, condensation, vapor pressure, sublimation and deposition, density, surface tension, thermal expansion and stress.Temperature is a measure of how hot or cold a substance is relative to another substance. Pressure is the force exerted per unit area. Vacuum is the removal of gas molecules.Condensation is the process of changing a gas into a liquid. Vaporization is changing a liquidinto a gas.Vapor pressure is the pressure exerted by a vapor in a closed container at equilibrium.Sublimation is the process of changing a solid directly into a gas. Deposition is changing a gas into a solid.Density is the mass of a substance divided by its volume.Surface tension of a liquid is the energy required to increase the surface area of contact.Thermal expansion is the increase in an object’s dimension due to heating.Stress occurs when an object is exposed to a force.Process Chemicals•Semiconductor manufacturing requires extensive chemicals.• A chemical solution is a chemical mixture. The solvent is the component of the solution present in larger amount. The dissolved substances are the solutes.•Acids are solutions that contain hydrogen and dissociate in water to yield hydronium ions. A base is a substance that contains the OH chemical group and dissociates in water to yield the hydroxide ion, OH-.•The pH scale is used to assess the strength of a solution as an acid or base. The pH scale varies from 0 to 14, with 7 being the neutral point. Acids have pH below 7 and bases have pH values above 7.• A solvent is a substance capable of dissolving another substance to form a solution.• A bulk chemical distribution (BCD) system is often used to deliver liquid chemicals to the process tools. Some chemicals are not suitable for BCD and instead use point-of-use (POU) delivery, which means they are stored and used at the process station.•Gases are generally categorized as bulk gases or specialty gases. Bulk gases are the relatively simple gases to manufacture and are traditionally oxygen, nitrogen, hydrogen, helium and argon.The specialty gases, or process gases, are other important gases used in a wafer fab, and usually supplied in low volume.•Specialty gases are usually transported to the fab in metal cylinders.•The local gas distribution system requires a gas purge to flush out undesirable residual gas. Gas delivery systems have special piping and connections systems. A gas stick controls the incoming gas at the process tool.•Specialty gases may be classified as hydrides, fluorinated compounds or acid gases.Chapter 6Contamination Control in Wafer FabsIntroduction•Modern semiconductor manufacturing is performed in a cleanroom, isolated from the outside environment and contaminants.Types of contamination•Cleanroom contamination has five categories: particles, metallic impurities, organic contamination, native oxides and electrostatic discharge. Killer defects are those causes of failure where the chip fails during electrical test.Particles: objects that adhere to a wafer surface and cause yield loss. A particle is a killer defect if it is greater than one-half the minimum device feature size.Metallic impurities: the alkali metals found in common chemicals. Metallic ions are highly mobile and referred to as mobile ionic contaminants (MICs).Organic contamination: contains carbon, such as lubricants and bacteria.Native oxides: thin layer of oxide growth on the wafer surface due to exposure to air.Electrostatic discharge (ESD): uncontrolled transfer of static charge that can damage the microchip.Sources and Control of Contamination•The sources of contamination in a wafer fab are: air, humans, facility, water, process chemicals, process gases and production equipment.Air: class number designates the air quality inside a cleanroom by defining the particle size and density.Humans: a human is a particle generator. Humans wear a cleanroom garment and follow cleanroom protocol to minimize contamination.Facility: the layout is generally done as a ballroom (open space) or bay and chase design.Laminar airflow with air filtering is used to minimize particles. Electrostatic discharge iscontrolled by static-dissipative materials, grounding and air ionization.Ultrapure deiniozed (DI) water: Unacceptable contaminants are removed from DI water through filtration to maintain a resistivity of 18 megohm-cm. The zeta potential represents a charge on fine particles in water, which are trapped by a special filter. UV lamps are used for bacterial sterilization.Process chemicals: filtered to be free of contamination, either by particle filtration, microfiltration (membrane filter), ultrafiltration and reverse osmosis (or hyperfiltration).Process gases: filtered to achieve ultraclean gas.Production equipment: a significant source of particles in a fab.Workstation design: a common layout is bulkhead equipment, where the major equipment is located behind the production bay in the service chase. Wafer handling is done with robotic wafer handlers. A minienvironment is a localized environment where wafers are transferred on a pod and isolated from contamination.Wafer Wet Cleaning•The predominant wafer surface cleaning process is with wet chemistry. The industry standard wet-clean process is the RCA clean, consisting of standard clean 1 (SC-1) and standard clean 2 (SC-2).•SC-1 is a mixture of ammonium hydroxide, hydrogen peroxide and DI water and capable of removing particles and organic materials. For particles, removal is primarily through oxidation of the particle or electric repulsion.•SC-2 is a mixture of hydrochloric acid, hydrogen peroxide and DI water and used to remove metals from the wafer surface.•RCA clean has been modified with diluted cleaning chemistries. The piranha cleaning mixture combines sulfuric acid and hydrogen peroxide to remove organic and metallic impurities. Many cleaning steps include an HF last step to remove native oxide.•Megasonics(兆声清洗) is widely used for wet cleaning. It has ultrasonic energy with frequencies near 1 MHz. Spray cleaning will spray wet-cleaning chemicals onto the wafer. Scrubbing is an effective method for removing particles from the wafer surface.•Wafer rinse is done with overflow rinse, dump rinse and spray rinse. Wafer drying is done with spin dryer or IPA(异丙醇) vapor dry (isopropyl alcohol).•Some alternatives to RCA clean are dry cleaning, such as with plasma-based cleaning, ozone and cryogenic aerosol cleaning.Chapter 7Metrology and Defect InspectionIC Metrology•In a wafer fab, metrology refers to the techniques and procedures for determining physical and electrical properties of the wafer.•In-process data has traditionally been collected on monitor wafers. Measurement equipment is either stand-alone or integrated.•Yield is the percent of good parts produced out of the total group of parts started. It is an indicator of the health of the fabrication process.Quality Measures•Semiconductor quality measures define the requirements for specific aspects of wafer fabrication to ensure acceptable device performance.•Film thickness is generally divided into the measurement of opaque film or transparent film. Sheet resistance measured with a four-point probe is a common method of measuring opaque films (e.g., metal film). A contour map shows sheet resistance deviations across the wafer surface.•Ellipsometry is a nondestructive, noncontact measurement technique for transparent films. It works based on linearly polarized light that reflects off the sample and is elliptically polarized.•Reflectometry is used to measure a film thickness based on how light reflects off the top and bottom surface of the film layer. X-ray and photoacoustic technology are also used to measure film thickness.•Film stress is measured by analyzing changes in the radius of curvature of the wafer. Variations in the refractive index are used to highlight contamination in the film.•Dopant concentration is traditionally measured with a four-point probe. The latest technology is the thermal-wave system, which measures the lattice damage in the implanted wafer after ion implantation. Another method for measuring dopant concentration is spreading resistance probe. •Brightfield detection is the traditional light source for microscope equipment. An optical microscope uses light reflection to detect surface defects. Darkfield detection examines light scattered off defects on the wafer surface. Light scattering uses darkfield detection to detectsurface particles by illuminating the surface with laser light and then using optical imaging.•Critical dimensions (CDs) are measured to achieve precise control over feature size dimensions.The scanning electron microscope is often used to measure CDs.•Conformal step coverage is measured with a surface profiler that has a stylus tip.•Overlay registration measures the ability to accurately print photoresist patterns over a previously etched pattern.•Capacitance-voltage (C-V) test is used to verify acceptable charge conditions and cleanliness at the gate structure in a MOS device.Analytical Equipment•The secondary-ion mass spectrometry (SIMS) is a method of eroding a wafer surface with accelerated ions in a magnetic field to analyze the surface material composition.•The atomic force microscope (AFM) is a surface profiler that scans a small, counterbalanced tip probe over the wafer to create a 3-D surface map.•Auger electron spectroscopy (AES) measures composition on the wafer surface by measuring the energy of the auger electrons. It identifies elements to a depth of about 2 nm. Another instrument used to identify surface chemical species is X-ray photoelectron spectroscopy (XPS).•Transmission electron microscopy (TEM) uses a beam of electrons that is transmitted through a thin slice of the wafer. It is capable of quantifying very small features on a wafer, such as silicon crystal point defects.•Energy-dispersive spectrometer (EDX) is a widely used X-ray detection method for identifying elements. It is often used in conjunction with the SEM.• A focused ion beam (FIB) system is a destructive technique that focuses a beam of ions on the wafer to carve a thin cross section from any wafer area. This permits analysis of the wafermaterial.Chapter 8Gas Control in Process ChambersEtch process chambers••The process chamber is a controlled vacuum environment where intended chemical reactions take place under controlled conditions. Process chambers are often configured as a cluster tool. Vacuum•Vacuum ranges are low (rough) vacuum, medium vacuum, high vacuum and ultrahigh vacuum (UHV). When pressure is lowered in a vacuum, the mean free path(平均自由行程) increases, which is important for how gases flow through the system and for creating a plasma.Vacuum Pumps•Roughing pumps are used to achieve a low to medium vacuum and to exhaust a high vacuum pump. High vacuum pumps achieve a high to ultrahigh vacuum.•Roughing pumps are dry mechanical pumps or a blower pump (also referred to as a booster). Two common high vacuum pumps are a turbomolecular (turbo) pump and cryopump. The turbo pump is a reliable, clean pump that works on the principle of mechanical compression. The cryopump isa capture pump that removes gases from the process chamber by freezing them.。