fm3之循序渐进

MB9B506之GPIO
无可否认，对一个CPU还不了解时我们最希望的是它能动起来。
那么我们就从GPIO开始吧。虽然晶体的配置，启动等都必须。我们还是先跳过吧。
MB9B506的GPIO有以下几个寄存器位来控制，选择是使用哪个功能：

当然还有作为输入输出数据的:PDIR(输入)，PDOR（输出）。
这里实际上都只是寄存器的一个位，具体的寄存器应该如此：
比如PFR： 实际寄存器FPRX的一位
PFR有PFR0，对应P0F~P00，PFR1，对应P1F~P10，…PFR8，对应P8F~P80，
PFR：GPIO和设备功能选择。 0：GPIO， 1：设备。
PCRX：为上拉配置位为1时选择
ADE 模拟输入允许（为1时选择）
SPSR 配置相关腿位USB或晶体腿脚或不是。为1时选择。
DDR 输入输出方向设置 0为输入，1为输出。
EPFR 扩展腿功能选择配置位。这个寄存器每个腿对应一个寄存器的多位（不是一位哦）这
种寄存器高达11个之多。
下面就以一个小例子作为结束吧。
例子：MB9B500开机启动后一般默认为GPIO输入（除了JTAG和时钟外）。
如果要点亮Led只要把DDR设置位1就可以送数据1或0到PDOR熄灭或点亮LED了（当
然要连接好电路）。
这个LCDIO初始化就用到了IO的配置：
void Init_LCD_IO()
{
/* Release the analog input function*/
ADE =0x03; //不选ADC（估计这个IO有ADC功能）
/*Select CPIO function*/
LCD_CS_PFR &= ~LCD_CS; //选择GPIO
/*Make pin output*/
LCD_CS_DDR |= LCD_CS;//方向输出
/*Select CPIO function*/
LCD_CD_PFR &= ~LCD_CD;
/*Make pin output*/
LCD_CD_DDR |= LCD_CD;
/*Select CPIO function*/
LCD_PS_PFR &= ~LCD_PS;
/*Make pin output*/
LCD_PS_DDR |= LCD_PS;
/*Select CPIO function*/
LCD_CLK_PFR &= ~LCD_CLK;
/*Make pin output*/
LCD_CLK_DDR |= LCD_CLK;
/*Select CPIO function*/
LCD_DATA_PFR &= ~LCD_DATA;
/*Make pin output*/
LCD_DATA_DDR |= LCD_DATA;
}

如何设置系统模式

如图MD1，MD0决定了系统启动
时钟的问题
有哪些时钟：外部主，外部子，内部低，内部高，PLL产生的5种吧。
Main clock (CLKMO)
Sub clock (CLKSO)
High-speed CR clock (CLKHC)
Low-speed CR clock (CLKLC)
PLL clock (CLKPLL)
复位
Power-on reset
INITX pin input
External power supply/low-voltage detection reset
Software watchdog reset
Hardware watchdog reset
Clock failure detection reset
Anomalous frequency detection reset
Software reset
TRSTX pin input
MB9B506之AD转换初探
3 units of A/D converters with 10-bit resolution or 12-bit resolution are installed.
Any channel can be selected to any unit from 16 channels of analog input.
The following triggers can be selected as an activation trigger for A/D conversion.
Priority conversion activation trigger
Trigger input from an external pin
Timer trigger input (base timer or multifunction timer)
Software activation
Scan conversion activation trigger
Timer trigger input (base timer or multifunction timer)
Software activation
具体看例子的ADC初始化
MB9B506之PWM
1. 16-bit PWM timer operations
2. One-shot operation
3. Interrupt causes and timing chart
4. Output waveforms
5. PWM timer operation flowchart
6. Timer Control Registers (TMCR and TMCR2) and Status Control Register (STC) used when the
PWM
timer is selected
7. PWM Cycle Set Register (PCSR)
8. PWM Duty Set Register (PDUT)
9. Timer Register (TMR)

MB9B506之多功能串口

UART0 (Asynchronous normal serial interface)
UART1 (Asynchronous multi-processor serial interface)
CSIO (Clock synchronous serial interface) (SPI can be supported)
LIN(LIN bus interface)
I2C (I2C bus interface)
串口模式寄存器：
MB9B506之CAN初探
见
FM3 32-BIT MICROCONTROLLER MB9Axxx / MB9Bxxx SeriesPERIPHERAL MANUAL

CAN Prescaler CAN分频器

哪里来的： For PLL: PLL output
For others (including Standby in Figure 1-1): Base clock (HCLK)
到哪里去？ 送给CAN做为时钟。注意：有个PLL时钟允许位SCM_CTL.PLLE
寄存器为CANPRE
CAN Controller CAN控制器
1 特征：
1），Supports CAN protocol version 2.0A/B 支持CAN协议2.0A/B版本
2），Supports a bit rate up to 1 Mbits/s 位速率达1Mbits/s
3），Identifier mask for each message object 标识符过滤对每个消息对象都可以进行
4），Supports programmable FIFO mode 支持可编程FIFO模式
5），Maskable interrupt 中断可屏蔽
6），Supports 32 message buffers 支持32个消息缓冲
7），Supports programmable loop-back mode for self-test operation 支持为自检准备的可编程
loop-back模式
8），Read and write from/to the message buffer using interface registers
使用接口寄存器读写消息缓冲

2 配置
1），CAN control unit CAN控制单元
Controls the CAN protocol and the serial registers for serial/parallel conversion to transfer
send/received messages.
2），Message RAM 消息内存
Stores message objects
3），Registers 寄存器
All registers used by CAN.
4），Message handler 消息处理
Controls the message RAM and CAN control unit.
5），CPU interface CPU接口
Controls the internal bus interface.

3 CAN控制操作
功能：
Message objects 消息对象
Message transmission 消息传输
Message reception 消息接收
FIFO buffer function FIFO缓冲功能
Interrupt function 中断功能
Bit timing 为时序
Test mode 测试模式
Software initialization 软件初始化

3.1 消息对象
Message objects 消息对象
The configuration of message objects in the message RAM (excluding the MsgVal, NewDat, IntPnd,
and TxRqst bits) is not initialized by a hardware reset. Initialize the message objects by the CPU, or set
the MsgVal bit to disable (MsgVal = "0"). Configure the CAN Bit Timing Register while the Init bit in
the CAN Control Register is "1".
消息内存中的消息对象的配置不是由硬件复位完成，还需要CPU初始化。或设置MsgVal位为不
可用（为0）。当控制寄存器的Inir位为1时配置位速率时间。

A message object must be configured by programming message interface registers (the IFx Mask
Register, IFx Arbitration Register, IFx Message Control Register, and IFx Data Register), and
then writing a message number to the corresponding IFx Command Request Register. By writing the
message number, the interface register data will be transferred to the addressed message object.
消息对象必须用(the IFx Mask Register, IFx Arbitration Register, IFx Message Control Register,
and IFx Data Register)可编程接口寄存器配置.并写一个消息号到相应的IFx Command Request
Register.通过写消息号，接口寄存器数据将传送到编址的消息对象。

When the Init bit in the CAN Control Register is cleared to "0", the CAN controller starts operation.
The received data that have passed acceptance filtering are stored into the message RAM. Messages
with pending transmission requests are transferred from the message RAM to the shift register in the
CAN controller, and then sent to the CAN bus.
当CAN控制寄存器的Init位清零后，CAN控制器开始启动了。接收数据经过过滤后存储到消息内
存。请求发送的消息从消息内存传送到CAN控制器的移位寄存器，发送到CAN总线。

The CPU reads the received messages and updates outgoing messages via message interface registers.
The CPU is interrupted according to the configuration of the CAN Control Register and IFx Message
Control Register (message object).
CPU接收消息和发送消息经过消息接口寄存器。根据CAN Control Register 和 IFx Message
Control Register (message object).的配置产生相应中断

Data transfer from/to message RAM 和消息内存直接的数据传输
When data transfer starts between the message interface registers and message RAM, the Busy bit in
the IFx Command Request Register is set to "1". After the transfer has finished, the Busy bit is cleared
to "0".(See Figure 3-1)
当数据开始在消息接口寄存器和消息内存直接传送，IFx Command Request Register的Busy位被设