门电路74182

© 2000 Fairchild Semiconductor Corporation DS009492April 1988Revised September 200074F182 Carry Lookahead Generator74F182Carry Lookahead GeneratorGeneral DescriptionThe 74F182 is a high-speed carry lookahead generator. It is generally used with the 74F181 or 74F381 4-bit arith-metic logic units to provide high-speed lookahead over word lengths of more than four bits.Featuress Provides lookahead carries across a group of four ALUs s Multi-level lookahead high-speed arithmetic operation over long word lengthsOrdering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Logic Symbols Connection DiagramOrder Number Package NumberPackage Description74F182SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F182PCN16E16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 274F 182Unit Loading/Fan OutFunctional DescriptionThe 74F182 carry lookahead generator accepts up to four pairs of Active LOW Carry Propagate (P 0–P 3) and Carry Generate (G 0–G 3) signals and an Active HIGH Carry input (C n ) and provides anticipated Active HIGH carries (C n +x ,C n +y , C n +z ) across four groups of binary adders. The 74F182 also has Active LOW Carry Propagate (P) and Carry Generate (G) outputs which may be used for further levels of lookahead. The logic equations provided at the outputs are:C n +x = G 0 + P 0 C nC n +y = G 1 + P 1 G 0 + P 1 P 0 C nC n +z = G 2 + P 2 G 1 + P 2 P 1 G 0 + P 2 P 1 P 0 C n G = G 3 + P 3 G 2 + P 3 P 2 G 1 + P 3 P 2 P 1 G 0P = P 2 P 2 P 1 P 0Also, the 74F182 can be used with binary ALUs in an active LOW or active HIGH input operand mode. The con-nections (Figure 1) to and from the ALU to the carry looka-head generator are identical in both cases. Carries are rippled between lookahead blocks. The critical speed path follows the circled numbers. There are several possible arrangements for the carry interconnects, but all achieve about the same speed. A 28-bit ALU is formed by dropping the last 74F181 or 74F381.*ALUs may be either 74F181 or 74F381FIGURE 1. 32-Bit ALU with Rippled Carry between 16-Bit Lookahead ALUsPin Names DescriptionU.L.Input I IH /I IL HIGH/LOW Output I OH /I OL C n Carry Input1.0/2.020 µA/−1.2 mA G 0, G 2Carry Generate Inputs (Active LOW) 1.0/14.020 µA/−8.4 mA G 1Carry Generate Input (Active LOW) 1.0/16.020 µA/−9.6 mA G 3Carry Generate Input (Active LOW) 1.0/8.020 µA/−4.8 mA P 0, P 1Carry Propagate Inputs (Active LOW) 1.0/8.020 µA/−4.8 mA P 2Carry Propagate Input (Active LOW) 1.0/6.020 µA/−3.6 mA P 3Carry Propagate Input (Active LOW) 1.0/4.020 µA/−2.4 mAC n +x − C n +z Carry Outputs50/33.3−1 mA/20 mA G Carry Generate Output (Active LOW)50/33.3−1 mA/20 mA PCarry Propagate Output (Active LOW)50/33.3−1 mA/20 mA74F182 Truth TableH = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Inputs OutputsC n G0P0G1P1G2P2G3P3C n+x C n+y C n+z G PX H H LL H X LX L X HH X L HX X X H H LX H H H X LL H X H X LX X X L X HX L X X L HH X L X L HX X X X X H H LX X X H H H X LX H H H X H X LL H X H X H X LX X X X X L X HX X X L X X L HX L X X L X L HH X L X L X L HX X X X X H H HX X X H H H X HX H H H X H X HH H X H X H X HX X X X X L X LX X X L X X L LX L X X L X L LL X L X L X L LH X X X HX H X X HX X H X HX X X H HL L L L L 474F 182Logic DiagramPlease note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.74F182Absolute Maximum Ratings (Note 1)Recommended Operating ConditionsNote 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.Note 2: Either voltage limit or current limit is sufficient to protect inputs.DC Electrical CharacteristicsStorage Temperature−65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C V CC Pin Potential to Ground Pin −0.5V to +7.0V Input Voltage (Note 2)−0.5V to +7.0V Input Current (Note 2)−30 mA to +5.0 mAVoltage Applied to Output in HIGH State (with V CC = 0V)Standard Output −0.5V to V CC 3-STATE Output −0.5V to +5.5VCurrent Applied to Output in LOW State (Max)twice the rated I OL (mA)ESD Last Passing Voltage (Min)4000VFree Air Ambient Temperature 0°C to +70°CSupply Voltage+4.5V to +5.5VSymbol ParameterMin TypMaxUnits V CCConditionsV IH Input HIGH Voltage 2.0V Recognized as a HIGH Signal V IL Input LOW Voltage 0.8V Recognized as a LOW Signal V CD Input Clamp Diode Voltage −1.2V Min I IN = −18 mA V OH Output HIGH 10% V CC 2.5V Min I OH = −1 mA Voltage 5% V CC 2.7I OH = −1 mA V OL Output LOW 10% V CC0.5V Min I OL = 20 mA Voltage I IH Input HIGH 5.0µA Max V IN = 2.7V CurrentI BVI Input HIGH Current 7.0µA Max V IN = 7.0V Breakdown Test I CEX Output HIGH 50µA Max V OUT = V CC Leakage Current V ID Input Leakage 4.75V 0.0I ID = 1.9 µATestAll Other Pins Grounded I OD Output Leakage 3.75µA 0.0V IOD = 150 mVCircuit Current All Other Pins Grounded I ILInput LOW −1.2mAMax V IN = 0.5V (C n )Current−2.4V IN = 0.5V (P 3)−3.6V IN = 0.5V (P 2)−4.8V IN = 0.5V (G 3, P 0, P 1)−8.4V IN = 0.5V (G 0, G 2)−9.6V IN = 0.5V (G 1)I OS Output Short-Circuit Current −60−150mA Max V OUT = 0V I CCH Power Supply Current 18.428.0mA Max V O = HIGH I CCLPower Supply Current23.536.0mAMaxV O = LOW 674F 182AC Electrical CharacteristicsSymbolParameterT A = +25°CT A = −55°C to +125°CT A = 0°C to +70°C UnitsV CC = +5.0V V CC = +5.0V V CC = +5.0V C L = 50 pFC L = 50 pF C L = 50 pF MinTyp Max Min Max Min Max t PLH Propagation Delay 3.0 6.68.5 3.012.0 3.09.5ns t PHL C n to C n +x , C n +y , C n +z 3.0 6.89.0 3.011.0 3.010.0t PLH Propagation Delay 2.5 6.28.0 2.511.0 2.59.0ns t PHL P 0, P 1, or P 2 to 1.53.75.01.07.01.56.0C n +x , C n +y , or C n +z t PLH Propagation Delay 2.5 6.58.5 2.511.0 2.59.5nst PHL G 0, G 1, or G 2 to 1.53.95.21.07.01.56.0C n +x , C n +y , or C n +z t PLH Propagation Delay 3.07.910.0 3.012.0 3.011.0ns t PHL P 1, P 2, or P 3 to G 3.0 6.08.0 2.510.0 3.09.0t PLH Propagation Delay 3.08.310.5 3.012.0 3.011.5ns t PHL G n to G3.0 5.77.5 2.510.0 3.08.5t PLH Propagation Delay 3.0 5.77.5 2.510.0 3.08.5nst PHLP n to P2.54.15.52.58.02.56.5 74F182Physical Dimensions inches (millimeters) unless otherwise noted16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M16D874F 182 C a r r y L o o k a h e a d G e n e r a t o rPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 WidePackage Number N16EFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。