USB-chirp序列测试

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USB2.0信号测试指导

USB2.0信号测试指导

USB 2.0 Compliance Testing with Agilent Infiniium OscilloscopesApplication Note 1400Who Should Read This Application Note?Digital designers and developers working towards USB 2.0 compliance.IntroductionUniversal Serial Bus (USB) burst on the scene in 1995 delivering a revolutionary way to connect personal computers and devices. Allowing hot-plug capability, USB has introduced ease-of-use to the PC device market by providing a simple connection scheme and protocol for a wide variety of computer devices, ranging from keyboards and mice to high-bandwidth devices such as printers, scanners, and cameras.USB has now successfullyreplaced aging serial and parallel ports as the connection of choice for both device manufacturers and end users. Whereas cable length and device expansionwere limitations with older serial and parallel connections, they are no issue for USB. Amazingly,it allows devices to exist up to 30-meters away from the host, and allows up to 127 devices to be connected to a single host and port at once through a series of USB hubs. The ability to talk directly to devices or to devices through hubs allows for this incredible expansion B 1.1 worked best for slower human-interface devices such as mice and keyboards, with low-speed operating at 1.5-Mb/s and full-speed operating at12-Mb/s. Higher-bandwidth devic-es were severely limited by these relatively slow data transfer rates. As a result, the USB-Implementers Forum (USB-IF) introduced the fully backward compatible USB 2.0 in May 2000, which resulted in a 40-fold increase in datathroughput for hi-speed over full-speed. USB 2.0 operates at 480-Mb/s—ideal for devices such as video-conferencing cameras and high-resolution printers. For more information, see the official USB-IF (USB Interoperability Forum) website at .Basic SpecificationsAs listed previously, USB 2.0 comprises three different data transfer rates—low-speed,full-speed, and hi-speed.Four wires compose the cable system—V BUS, D+, D-, and ground. Devices may be either bus-powered, with 500-mA maximum bus current withdraw, or self-powered, meaning they have their own power supply.D- and D+ is a differential signal pair that serves as the primary information carrier between the host, hubs, and devices. USB 2.0 supports three different types of data transfer: interrupt, bulk, or isochronous. Control packets containing commands or query parameters may also be sent by the host.The flexibility inherent in USB is a direct result of the specifica-tions above and the stringent regulations and compliance testing mandated by the USB-IF. There are three kinds of compliance tests: framework test,interoperability test, and electri-cal test. This document onlydiscusses Infiniium’s electricaltest solution.Low, full, and hi-speed USBrequire compliance with thesignal quality, in-rush currentcheck, droop/drop and backdrive voltage electrical tests. Hi-speed requires compliance withan additional suite ofelectrical tests—hi-speed sig-nal quality, receiver sensitivity,CHIRP timing, and packetparameters. Older methods ofcompliance testing included firstcapturing the signals on a scope,then moving the data to a PC so itcould be cropped, stored in a .tsvformat, and finally analyzed inMATLAB®. The Agilent InfiniiumUSB Test Option is the first scopesolution in the industry that uti-lizes the official USB-IF MATLABscript. As the result, it providesan affordable, trustworthy, single-box, compliance solution—allow-ing you to say, as did one of ourcustomers, “I know I’m going topass!”23Full/Low-Speed Test SuiteAgilent test equipment has beenapproved by the USB-IF.Figure 1. Agilent Infiniium at official USB-IF Plugfest.The basic USB 2.0 electrical test suite includes signal quality,in-rush current check, and droop/drop tests. A SQiDD (Signal Quality inrush Droop Drop) fix-ture must be used for these tests. Agilent provides a SQiDD boardFull/Low-Speed Test Fixturethat is orderedseparately as part numberE2646A. The USB-IF exclusively uses the Agilent SQiDD board for official compliance testing.Figure 2. Agilent SQiDD board.Wire loopWire loop‘B’ Socket‘A’ Socket‘B’ Socket‘B’ Socket‘A’ Socket‘A’ SocketSwitchSwitch4Signal Quality TestUsing an oscilloscope to measure transceiver characteristics, the signal quality test looks at:• Signal eye• End of Packet (EOP) width • Signaling Rate • Rise/Fall Times• Cross-over Voltage Range • Consecutive Jitter • Paired JK Jitter • Paired KJ JitterSignal quality testing can beperformed for either upstream data or downstream data. In the case of upstream testing, signals travelling from the device to the host are captured and analyzed. Downstream testing performs just the opposite, capturing signals travelling from the host towards the device or terminating hub. Figure 3 shows a captured down-stream packet on the Infiniiumscope with the USB Test Option.Figure 3. Captured downstream packet.Signal Quality Test (continued)launched, other conditions mustalso be set in the software. Forsignal quality tests, these addi-tional conditions include tierand near end/far end. The tierrefers to the distance between thedevice and the host computer. Ifthe device is connected directly tothe host computer, the tier equals1. If the device is separated fromthe host computer by 3 hubs, thetier equals 4. Compliance testingmandates that testing occur ata minimum tier of 6; therefore,Agilent recommends that testsalways be performed with a tierFigure 4. Infiniium USB test menu.of 6. Test results may be storedin a data file on the Infiniium’sC: drive, or may also be stored toa USB flash drive.Infiniium displays all test resultsin an html format, including theeye diagram.Figure 5. Infiniium signal quality test results.5In-Rush Current Checkdictates that a surge of currentwill occur, followed by a lessersteady-state current level, whenpower is applied to a device.The hot-pluggable nature of USBrequires that the total inrushsurge current be tested to ensurethat it remains within the limitsfor the device. If the inrushcurrent does not remain withinits limits (100 mA), not only canit cause damage to the device, butit can also take power from otherdevices connected to the sameport.The USB 2.0 specification out-lines a total inrush surge currentlimit of 50-uC. A waiver is grant-ed at 150 μC.Figure 7. In-rush current spike.67Droop and Drop TestingBack-Drive Voltage TestDroop and drop testing proce-dures vary based on whether the device is self-powered or bus powered.Hosts and Self-Powered Hubs Drop testing measures the DC voltage drop across each load board attached to the SQiDD board. To get a good indication of voltage drop, the test is per-formed under two conditions—no load and load. Under no load testing, all downstream ports remain open, while the V BUS voltage test points on the SQiDD board are probed. Load testing tests the V BUS voltage test points with 500-mA loads applied to all downstream ports. The lowest measured loaded value should be used for the droop test.Droop testing involves measuring the AC voltage drop on V BUS that occurs when all but one port are under 500-mA loads; The unload-ed port is then connected to the SQiDD board. Once the instantan-cous AC voltage drop is captured on the display, markers are used to bracket the area between the lowest point and steady-state voltage point of V BUS . Infiniium then uses the bracketed data toperform the droop test.Figure 8. Droop setup for hosts and self-powered hubs.The droop test for bus-powered hubs again uses the 100-mA-load board. This load board is con-nected to all but one port on the bus-powered device. The SQiDD board is then attached to the unloaded port. Once again,markers are used to bracket the area between the lowest point on the captured data and the steady-state voltage. TheInfiniium then uses the bracketed data to run the drop test.Bus-Powered HubsDrop tests for bus-powered hubs use 100-mA load boards instead of the 500-mA load boards used in the self-powered hub proce-dure. These 100-mA boards are connected to all downstream ports. The V BUS voltage is then measured at the hub upstream port and at each downstream port. The lowest measured downstream value is used for the drop test.The back-drive voltage test is performed to ensure that a device only draws and does not sourcecurrent from V BUS on its upstream facing port at all times. If a device supplies current at this port, a number of consequences can occur, including hub enumerationfailure, PC boot failure, and motherboard failure. This test measures the DC voltages ofV BUS , D+, and D- before and after device enumeration. The voltages are then recorded on the back-drive voltage fixture. Any voltage exceeding 400-mV is considered a failure.8On the hi-speed USB Test Bed Computer, the USB hi-speedElectrical Test Tool is required.Figure 9. USB-IF hi-speed electrical test tool.Hi-Speed Electrical Test SuiteAn additional suite of tests was added to the USB 2.0 compliance procedure to accommodate the new hi-speed mode. These tests include hi-speed signal quality, receiver sensitivity, CHIRP timing, and packet parameter.Hi-Speed Electrical Test Tool9The hi-speed signal quality test utilizes the hi-speed signal quality board, as shown in Figure 10.The nomenclatures of the test points differ between the Agilent hi-speed test fixture and the Intel test fixture. The official USB test procedure is written with reference to Agilent’s test fixtures. Refer to Table 5, the cross-reference chart, whenusing Intel’s test fixture.Figure 10. Hi-speed signal quality boards (Agilent fixture andIntel fixture—device signal quality test).Hi-Speed Test Fixture10Hi-Speed Signal Quality TestInvoke the Hi-speed Electrical Test Tool software on Electrical Test bed computer and select TEST_PACKET to perform the sig-nal quality test. Figure 11 shows a hi-speed test packet captured on an Infiniium oscilloscope.Prior to testing, it must be deter-mined if the device incorporates a captive cable, or if it contains a series B or mini-B connector. During upstream tests, captive cables require that tests be run at the far end. B-connector cables require that tests be run at the near end. Figure 12 shows a hi-speed eye pattern result displayed on an Infiniiumoscilloscope.Figure 11. Hi-speed test packet.Figure 12. Hi-speed signal quality eye diagram.MonotonicityMonotonicity tests if a transmit-ted signal increases or decreases in amplitude without reversal in the opposite direction. The monotonicity characteristic of a signal can be viewed using the hi-speed signal quality eye template (Figure 12). There is no indepen-dent monotonicity test mandated by the USB-IF.Receiver SensitivityThe receiver sensitivity tests verify sensitivity of the receivers of a device on both the upstream and downstream data ports in noisy environments. The Agilent 81130A/81134A Pulse/Pattern Generator is used to emulate IN commands from the port to the device address 1. IN commands are sent from the computer to the device under test, which should be in an unsquelched mode. The noise is represented by a pre-set level, whereby a signal meeting and exceeding this level responds to the IN command with anNAK. All packets from the data generator must be NAK’d by the port under test. The amplitude of the data generator packets is then reduced in 20-mV increments as the test is run. The amplitude of these packets should be reduced until the NAK packets become infrequent. The data generator amplitude is then immediately increased to the point where the Figure 14. Receiver sensitivity test.Data generator packet Device responsegenerator packetPacket Parameters TestAnother test using the hi-speedsignal quality board tests thedevice packet parameters. Thehi-speed signal quality test boardallows for better reception of thepackets coming from the device.This test measures parameterssuch as sync field length, end ofpacket (EOP) width, and inter-packet gap.Figure 13. Device inter-packet gap.NAK packets are not intermittent. This indicates the points of minimum receiver sensitivity levels before squelch.When the device receives IN packets with a signal amplitude in excess of 150-mV, all packets should be NAK’d. When the device receives IN packetswith a signal amplitude below 100-mV, all packets should be squelched. A waiver is granted for squelch at +/- 50-mV for each level.11CHIRP Timing TestThe CHIRP test utilizes thehi-speed signal quality test fixture to measure timing and voltage on both upstream and downstream ports. The deviceis hot-plugged to the port andis immediately enumerated to capture the CHIRP handshake. Within the handshake, the CHIRP-K duration is measured to verify that it is within the 1.0-ms and 7.0-ms allowable latency. After the CHIRP K-J, K-J, K-J sequence, the device responds by turning on its hi-speed termina-tions. A drop of amplitude from800-mV nominal to 400-mV nominal occurs. The time between the beginning of thelast J in the CHIRP K-J, K-J, K-J sequence and the time whenthe device turn on initiates its hi-speed terminations must be mea-sured to verify that it is less than or equal to 500-μs.In addition to measuring thetime between the last J in CHIRP and the initiation of hi-speed termination, the CHIRPtest also measures device suspend/resume/reset timing as well as the K and J amplitudes.Figure 15. CHIRP test.Device’s chip latency(2.5 µs <-> 3 ms)Device hi-speedtermination ONFigure 16. Time between last J in CHIRP and hi-speed termination initiation.CHIRP K(1 ms <-> 7 ms)12Impedance Measurements In this test, differential time domain reflectometer (TDR) mea-surements are taken tomeasure the impedance of the hi-speed signaling path andactive terminations of the device under test. The TDR measure-ments are compared with the USB-IF specification require-ments. The device under testis powered, placed in SE0-NAK mode, and isolated from the system. D+ and D- are measuredto verify that they are 0-V ±10-mV.A 400-ps edge is then driven into the device. The resulting wave-form indicates whether or not the termination impedance and the through impedance meet the requirements. The TDR measure-ment is not required for compli-ance testing. A PASS signal quality test will suffice for the TDR measurement.Figure 17. TDR measurement.USB connectorTermination resistor1314SummaryAgilent provides a comprehen-sive, easy-to-use solution for USB compliance testing. The compli-ance testing that once took days now takes only minutes. The indi-vidualized test boards provideflexibility and affordability for the laboratory choosing to test facets of the USB specification simultaneously.In conclusion, the AgilentInfiniium USB Test Option has been described this way:“The term ‘God Send’ comes to mind. Before the arrival of this scope, a USB test was something to be avoided! It often required half a day to set up the test and an additional 30 minutes to massage the numbers into anacceptable MATLAB format.Needless to say only the minimum number of tests required was ever actually performed.“In a nutshell, this product has revolutionized the way in which we look at USB. We now have a designated test system that is reliable and easy to use and fast. The main result is that we can now provide real-time feedback, and the amount of testing we perform is probably up 30-fold or more. And as you may have guessed, the additional testing has turned up a myriad of inter-esting opportunities for future improvements. Just for fun we have even started looking at our competitor’s products!”MATLAB ® is a U.S. registered trademark of Math Works, Inc.Windows ® is a U.S. registered trademark of Microsoft Corporation.Agilent Technologies OscilloscopesMultiple form factors from 20 MHz to >90 GHz | Industry leading specs | Powerful applications15Remove all doubtOur repair and calibration services will get your equipment back to you, performing like new, when promised. You will get full value out of your Agilent equipment throughout its lifetime. Your equipment will be serviced by Agilent-trained technicians using the latest factory calibration procedures, automated repair diagnostics and genuine parts. You will always have the utmost confidence in your measurements.Agilent offers a wide range of additionalexpert test and measurement servicesfor your equipment, including initialstart-up assistance, onsite educationand training, as well as design, systemintegration, and project management.For more information on repair andcalibration services, go to:/find/removealldoubt/find/openAgilent Open simplifies the process of connecting and programming test systems to help engineers design, validate and manufacture electronic products. Agilent offers open connectivity for a broad range of system-ready instruments, open industry software, PC-standard I/O and global support, which are combined to more easily integrate test system development./find/emailupdates Get the latest information on the products and applications you select./find/agilentdirect Quickly choose and use your test equipment solutions with confidence.Agilent Email UpdatesAgilent DirectLXI is the LAN-based successor to GPIB, providing faster, more efficient connectivity. Agilent is a founding member of the LXI consortium./fi nd/usb2_compliance For more information on Agilent Technologies’ products, applications or services, please contact your local Agilent office. The complete list is available at:/fi nd/contactusAmericasCanada (877) 894-4414 Latin America 305 269 7500United States (800) 829-4444Asia Pacifi c Australia 1 800 629 485China 800 810 0189Hong Kong 800 938 693India 1 800 112 929Japan 0120 (421) 345K orea 080 769 0800Malaysia 1 800 888 848Singapore 1 800 375 8100Taiwan 0800 047 866Thailand 1 800 226 008Europe & Middle EastAustria 01 36027 71571Belgium 32 (0) 2 404 93 40 Denmark 45 70 13 15 15Finland 358 (0) 10 855 2100France 0825 010 700* *0.125 €/minute Germany 07031 464 6333****0.14 €/minuteIreland 1890 924 204Israel 972-3-9288-504/544Italy 39 02 92 60 8484Netherlands 31 (0) 20 547 2111Spain 34 (91) 631 3300Sweden 0200-88 22 55Switzerland 0800 80 53 53United Kingdom 44 (0) 118 9276201Other European Countries: /fi nd/contactusRevised: July 17, 2008Product specifi cations and descriptions in this document subject to change without notice.© Agilent Technologies, Inc. 2008Printed in USA, August 1, 20085988-6219EN。

测试指导类-USB接口指标测试指导书

测试指导类-USB接口指标测试指导书

USB接口指标测试指导书最小部门:(企业业务BG—企业数通产品线一企业数通研发管理部一企业数通硬件开发部)评审记录:所属产品:来源:关键词:USB接口指标:USB眼图测试;Chirp测试;Droop测试。

1、USB接口指标描述为了顺应市场的要求,目前的产品大部分都出的是USB2.0的接口,而且我们产品都是作为HOST端,USB2.0一共提供3种速率,如下表。

当我们的设备是作为HOST端是,数拯方向是Down Stream,其关注的指标有:1、信号质量1)眼图测试(Eye-Diagram testing)2)信号速率(Signal Rate)3)包结尾宽度(End of Packet Width)4)JK抖动(JK jitter)5)KJ抖动(KJ jitter)6)连续抖动(Consecutive jitter)7)单i周性测试(Monotonic test (for HS))8)上升与下降时间(Rise and Fall times)2、Droop(电压跌落)3、Chirp (Shake Hands)2、USB接口指标测试方法(1)信号质量测试由于我们的设备都是作为HOST 端,在这里只介绍HOST 端的接口指标测试方法。

1) USB High Speed 信号质量测试方法a) 连接好被测设备(DUT)、测试夹具和示波器,具体的连接示意图如图1所示。

图1 High Speed 信号质量测试连接示意图b)DUT 上电,启动USB 测试包,发送测试命令,使USB 端口能够发送岀测试码 c) 运行示波器上的USB 测试软件,在Analyze 菜单中选择USB2.0 Test 启动后的界而如图3所示。

在软件的Measurements 菜单中选择Select,然后选择High Speed,选择测试项,在这里可以点击Select All.将信号质量的测试项全部选 上。

在这个界而上还有一个选项Config,该选项是用来初始化MonotonicBnrtmh Droop(k»v»c<* Or script n>nPCI-Mp»trosusB?图2 High Speed 信号质量测试波形Tektronix Oscilloscope with Application running流.具体的码流波形如图2所示。

最全的USBType-C?互连一致性测试方案

最全的USBType-C?互连一致性测试方案

最全的USBType-C®互连一致性测试方案USB-IF协会于2014年发布的Type-C接口是具有突破性的互连标准,其优异的性能、极简连接以及可扩展和多功能受到整个业内消费者的瞩目。

近几年Type-C技术更是凭借以下的诸多优点,在消费类电子行业得到蓬勃发展:·极简连接:相比之前A/B/Mini-B/Micro-B口可以实现约8.3mm x 2.5mm 小尺寸、扁平轻薄、支持正反连接。

·可扩展性:可用于不同终端设备诸如电脑,手机,显示器,U盘,扩展坞等等。

·多功能性:支持USB2.0、USB3.2、USB4、DP1.4a、DP 2.0/2.1、PCIe和PD功能。

·生态多样:包括芯片和终端产品,比如台式机及笔记本、手机、扩展坞、U 盘、显示器、嵌入式板卡、无源线缆、有源线缆等。

2021年9月,欧盟委员会正式提出一项议案,将USB Type-C®作为智能手机、平板电脑、耳机、便携式音响、摄像头和一些电子游戏机的标准接口,此举旨在减少充电器生产相关的浪费;2021年6月新的USB PD3.1规范,扩展PD3.0支持的供电最大供电瓦数100W到240W(EPR: Extended Power Range),可以为游戏本、大显示器等装置供电。

这一系列新的法规的发布将更大地促进Type-C互连技术在整个行业的推广和普及。

USB Type-C®连接器和电缆组件简介USB用于连接和供电设备的几种电缆连接器类型包括:Type-A、Type-B、Micro-B、Mini-B 等。

与这些现有类型的USB电缆相比,USB Type-C®电缆具有对称和可逆的独特可用性优势。

任何使用计算机和外围设备的人都知道,USB 标准 A/B 连接器必须单向插入,并且可能需要尝试几次才能找到正确的方向。

USB Type-C®连接器更容易插入,因为它是对称的并且可以在任何USB Type-C®设备之间的任一方向插入。

测试指导类-USB接口指标测试指导书

测试指导类-USB接口指标测试指导书

USB接口指标测试指导书最小部门:(企业业务BG—企业数通产品线—企业数通研发管理部—企业数通硬件开发部)评审记录:所属产品:来源:关键词:USB接口指标;USB眼图测试;Chirp测试;Droop测试。

1、USB接口指标描述为了顺应市场的要求,目前的产品大部分都出的是的接口,而且我们产品都是作为HOST 端,一共提供3种速率,如下表。

当我们的设备是作为HOST端是,数据方向是Down Stream,其关注的指标有:1、信号质量1)眼图测试(Eye-Diagram testing)2)信号速率(Signal Rate)3)包结尾宽度(End of Packet Width)4)JK抖动(JK jitter)5)KJ抖动(KJ jitter)6)连续抖动(Consecutive jitter)7)单调性测试(Monotonic test (for HS))8)上升与下降时间(Rise and Fall times)2、Droop(电压跌落)3、Chirp (Shake Hands)2、USB接口指标测试方法(1)信号质量测试由于我们的设备都是作为HOST端,在这里只介绍HOST端的接口指标测试方法。

1)USB High Speed信号质量测试方法a)连接好被测设备(DUT)、测试夹具和示波器,具体的连接示意图如图1所示。

图 1 High Speed信号质量测试连接示意图b)DUT上电,启动USB测试包,发送测试命令,使USB端口能够发送出测试码流,具体的码流波形如图2所示。

图 2 High Speed信号质量测试波形c)运行示波器上的USB测试软件,在Analyze菜单中选择Test 启动后的界面如图3所示。

在软件的Measurements菜单中选择Select,然后选择High Speed,选择测试项,在这里可以点击Select All,将信号质量的测试项全部选上。

在这个界面上还有一个选项Config,该选项是用来初始化Monotonic Property,选择后的界面如图4所示,是用来初始化边沿的单调性是从高低电平的多少百分比开始Check。

USB 2.0 实体层测试操作

USB 2.0 实体层测试操作

USB 2.0 實體層測試的理解與實際操作(上)〈主筆室〉前言參與USB 2.0 裝置設計、分析和驗證工作的設計人員,每天都面臨著縮短新產品上市時間的壓力。

Tektronix 的各種測試儀器,可使設計人員快速而精確地進行USB 建置者論壇(USB Implementers Forum,簡稱USB-IF) 建議的所有相容性認證測試。

通用串列匯流排(USB 2.0) 是一種連接技術規格,旨在連接電腦外面的週邊裝置,可在不打開電腦外殼安裝所需裝置,免除了開機箱插卡的麻煩。

USB 相容裝置為使用者提供使用方便、擴充性和高傳輸速度。

USB 2.0 技術已被今天的市場廣泛接受,它將資料處理速率提升了40 倍。

資料處理量的增加為許多新型週邊產品打開新天地,包括全動態視訊至輔助性的、只有錢包大小的硬碟機。

但是,隨著資料速率的急速升高,也出現了新的測試和量測方面的挑戰。

USB 2.0 規格推出了新的相容性要求。

在製造商將USB-IF「認證」標誌標籤貼在產品包裝之前,USB 2.0 裝置的設計人員必須恰當地鑑定其設計並檢驗產品是否符合業界標準。

因此,恰當的測試工具對USB-IF 相容性測試極其重要,這些測試項目包括低速、全速和高速裝置和集線器的眼狀圖和參數測試。

本文章將重點介紹對USB 2.0 實體層量測和電相容性測試(電測試和高速測試)的解說和實際操作,並介紹各項測試所需的儀器。

USB 2.0 的基本原理USB 2.0 是一種串列匯流排,使用四條線- VBUS、D-、D+ 和接地。

D- 和D+ 傳送資料。

VBUS 為來自主機(Host) 或集線器(hub) 的電源。

USB 2.0 規定了下列速度選擇和上升時間:USB 2.0 裝置可以自行供電(有自己的電源供應器),可由匯流排供電(電源來自主機)。

自行供電裝置須盡量少用電。

USB 2.0 規格中列有這方面的詳細測試規格。

USB 2.0 電測試USB 2.0 電測試包括訊號品質、峰值電流檢查以及壓降(Drop) 和浮動(Droop) 電壓測試。

最新USB-chirp序列测试资料

最新USB-chirp序列测试资料

USBchirp信号测试1 信号及原理分析1.1 KJ信号说明USBchirp信号分为K信号和J信号。

根据USB速率将chirp信号做如下区别:1.2 USB全速高速识别过程分析根据规范,全速(Full Speed)和低速(Low Speed)很好区分。

因为在设备端有一个1.5k的上拉电阻,当设备插入hub或上电(固定线缆的USB设备)时,有上拉电阻的那根数据线就会被拉高,hub根据D+/D-上的电平判断所挂载的是全速设备还是低速设备。

USB全速/低速识别相当简单,但USB2.0,USB1.x就一对数据线,不能像全速/低速那样仅依靠数据线上拉电阻位置就能识别USB第三种速度——高速。

因此对于高速设备的识别就显得稍微复杂些。

表1中图3展示了一个高速设备连接到USB 2.0的hub上的协商(negotiation)情形。

高速设备初始是以一个全速设备的身份出现的,即和全速设备一样,D+线上有一个1.5k的上拉电阻。

USB2.0的hub把它当作一个全速设备,之后,hub 和设备通过一系列握手信号确认双方的身份。

在这里对速度的检测是双向的,比如高速的hub需要检测所挂上来的设备是高速、全速还是低速,高速的设备需要检测所连上的hub是USB2.0的还是1.x的,如果是前者,就进行一系列动作切到高速模式工作,如果是后者,就以全速模式工作。

hub检测到有设备插入/上电时,向主机通报,主机发送Set_Port_Feature请求让hub复位新插入的设备。

设备复位操作是hub通过驱动数据线到复位状态SE0(Single-ended 0,即D+和D-全为低电平),并持续至少10ms。

高速设备看到复位信号后,通过内部的电流源向D-线持续灌大小为17.78mA 电流。

因为此时高速设备的1.5k上拉电阻还未撤销,在hub端,全速/低速驱动器形成一个阻抗为45欧姆(Ohm)的终端电阻,2电阻并联后仍是45欧姆左右的阻抗,所以在hub端看到一个约800mV的电压(45欧姆*17.78mA),这就是Chirp K信号。

USB 2.0测试

USB 2.0测试

USB 2.0Pre-Compliance Physical Layer TestingBrief Introduction to USB 2.0fFour wire system (D+, D-, VBUS, GND)f USB2.0 provides the following speed selectionsfSelf powered and Bus powered devices VBUS supplies power to devices that driver their primary power from the host or hub. f The USB-IF has instituted a certification and marking program–Persuade developers to fully test their USB devices. –New USB trademark logo that indicates a device is certified and conforms to all applicable USB 2.0 specifications.500 ps 480 Mbps High Speed4 –20 ns 12 Mbps Full Speed75 to 300 ns 1.5 Mbps Low SpeedRise Time Data RateUSB2.0一致性测试4Three categories of Compliance testing 0Physical layer (Electrical Test)0Protocol layer0Interoperability testing0USB 2.0 legacy tests0Signal Quality Test0Droop & Drop Test0Inrush Current Test0HS Specific Tests0Chirp Test0Monotonic Test0Receiver sensitivity Test0Impedance Test (TDR)USB2.0 信号质量测试信号质量测试包括:f眼图测试(Eye-Diagram testing)f信号速率(Signal Rate)f包结尾宽度(End of Packet Width)f交叉点电压范围(Cross-over voltage range (for LS and FS)) f JK抖动(JK jitter)f KJ抖动(KJ jitter)f连续抖动(Consecutive jitter)f单调性测试(Monotonic test (for HS))f上升与下降时间(Rise and Fall times)测试环境需求f500 MHz PC with Windows 2000 (English) or XP OS f High-Speed Host Controllerf USB-IF furnished Test Mode Softwaref Good quality USB cablesf Good quality USB Hub– 1.1 –Belkin F5U100 / F5U101– 2.0 –Belkin F5u221 / IOGer GUH-204 ‘Gold’ATEN UH-204 ‘Gold’f Mouse (any listed on USB-IF mouse)当DUT为Host时所测试的信号均为Host设备发出,其信号方向为下行(Down Stream)测试项1. Signal Quality–High speed test 480Mbit/S–Full speed test 12Mbit/S–Low speed test 1.5Mbit/S2. Droop( 压 落)3. Chirp (Shake Hands)Host High-Speed Signal Qualityconnector ,测Host High-Speed Signal Qualityf Win 2K (英文版) or XP PC 运行HSElecticalTestTool软件,选择HOST 然后按TEST.f进入下一个窗口在Port Control 内选择Test_packet, 在Port 内选择所要测试的Port 然后按EXECUTE.f Scope 执行TDSUSB2 软件,选择High Speed 然后将Signal quality 的六个项目全部点选.f Eye diagram, Signal rate, Rise time, Fall Time, EOP Width, Monotonic.f按下Configure 点选Configure 然后选择Tier 6, Down-stream, Near End. 点选Source 选择所要用的Input Channel.f点选RUN 的符号此时可看到TEST_PACKET 的波形f按下OK 既可完成测试Host High-Speed Signal QualityHost High-Speed Signal QualityRUNHost High-Speed Signal QualityÅWaveform Eye Diagram ÆHost High-Speed Signal Quality f Results: SummaryHost High-Speed Signal Quality f Results: DetailsReport GeneratorUtilities ÆReport GeneratorSelect 1. Tektronix Specific2. Plug-fest Specific3. CSV FormatFile nameHost Full-Speed Signal Quality1.1 HubSwitch set to INIT此connector直接,接到Hub1Host Full-Speed Signal Qualityf Win 2K ( ) or XP PC 不 执行HSElecticalTestTool软f测试 , Switch 切 INITf Scope 执行TDSUSB2 软 选择Full Speed 将Signal quality 项 选.f Eye diagram, Signal Rate, Rise time, Fall Time, EOP Width, Paired JK Jitter, Paired KJJitter, Consecutive Jitter, Cross Overf Configure 选Configure 选择Tier 6, Down-stream, Far End. 选Source 选择Input Channel.f 选RUN 时 Full-Speedf OK 测试Host Full-Speed Signal QualityHost Full-Speed Signal QualityÅWaveform Eye DiagramÆHost Low-Speed Signal Quality此connector直接,接到待测口Host Low-Speed Signal Qualityf Win 2K (英文版) or XP PC 不可执行HSElecticalTestTool软件f执行TDSUSB2 软件,选择Low Speed 然后将Signal quality 的九个项目全部点选.f Eye diagram, Signal Rate, Rise time, Fall Time, EOP Width, Paired JK Jitter,Paired KJ Jitter, Consecutive Jitter, Cross Overf按下Configure 点选Configure 然后选择Tier 6, Down-stream, Far End。

USB 2.0一致性测试

USB 2.0一致性测试

待測件為Device 待測件為
所要測試的訊號為Device送出的訊號 訊號的方向為上傳 送出的訊號, 訊號的方向為上傳(Up Stream目 1. Signal Quality
• • High speed test 480Mbit/S Full speed test 12Mbit/S
4
USB2.0 Signal Quality Testing
Signal Quality testing includes: Eye-Diagram testing Signal Rate End of Packet Width Cross-over voltage range (for LS and FS) JK jitter KJ jitter Consecutive jitter Monotonic test (for HS) Rise and Fall times
Win 2K (英文版 or XP PC 不可執行 HSElecticalTestTool 軟體 英文版) 英文版 軟體,選擇 執行 TDSUSB2 軟體 選擇 Low Speed 然後將 Signal quality 的 九個項目全部點選. 九個項目全部點選 • Eye diagram, Signal Rate, Rise time, Fall Time, EOP Width, Paired JK Jitter, Paired KJ Jitter, Consecutive Jitter, Cross Over 按下 Configure 點選 Configure 然後選擇Tier 6, Down-stream, 然後選擇 Far End. 點選 Source 選擇所要用的 Input Channel. 點選 RUN 的符號 此時可看到 Low-Speed 的波形 按下 OK 既可完成測試 *如果 如果Rise Time有問題 可用 的方式. 如果 有問題 可用cursor的方式 的方式 File Preference Advance 將 Packet identification by user using cursors 勾 選 , 如下兩張圖的例子
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USBchirp信号测试
1 信号及原理分析
1.1 KJ信号说明
USBchirp信号分为K信号和J信号。

根据USB速率将chirp信号做如下区别:
RenGE注:
不同的速率模式,对于K、J的形态定义是不同的。

DP表示D+ PIN,DM表示D- PIN。

SE0是一种D+和D-都为0电平的特殊状态。

多用于表示End-Of-Packet。

1.2 USB全速高速识别过程分析
根据规范,全速(Full Speed)和低速(Low Speed)很好区分。

因为在设备端有一个1.5k的上拉电阻,当设备插入hub或上电(固定线缆的USB设备)时,有上拉电阻的那根数据线就会被拉高,hub根据D+/D-上的电平判断所挂载的是全速设备还是低速设备。

USB全速/低速识别相当简单,但USB2.0,USB1.x就一对数据线,不能像全速/低速那样仅依靠数据线上拉电阻位置就能识别USB第三种速度——高速。

因此对于高速设备的识别就显得稍微复杂些。

表1中图3展示了一个高速设备连接到USB 2.0的hub上的协商(negotiation)情形。

高速设备初始是以一个全速设备的身份出现的,即和全速设备一样,D+线上有一个1.5k的上拉电阻。

USB2.0的hub把它当作一个全速设备,之后,hub 和设备通过一系列握手信号确认双方的身份。

在这里对速度的检测是双向的,比如高速的hub需要检测所挂上来的设备是高速、全速还是低速,高速的设备需要检测所连上的hub是USB2.0的还是1.x的,如果是前者,就进行一系列动作切到高速模式工作,如果是后者,就以全速模式工作。

hub检测到有设备插入/上电时,向主机通报,主机发送Set_Port_Feature请求让hub复位新插入的设备。

设备复位操作是hub通过驱动数据线到复位状态SE0(Single-ended 0,即D+和D-全为低电平),并持续至少10ms。

高速设备看到复位信号后,通过内部的电流源向D-线持续灌大小为17.78mA 电流。

因为此时高速设备的1.5k上拉电阻还未撤销,在hub端,全速/低速驱动器形成一个阻抗为45欧姆(Ohm)的终端电阻,2电阻并联后仍是45欧姆左右的阻抗,所以在hub端看到一个约800mV的电压(45欧姆*17.78mA),这就是Chirp K信号。

Chirp K信号的持续时间是1ms~7ms。

在hub端,虽然下达了复位信号,并一直驱动着SE0,但USB2.0的高速接收器一直在检测Chirp K信号,如果没有Chirp K信号看到,就继续复位操作,
直到复位结束,之后就在全速模式下操作。

如果只是一个全速的hub,不支持高速操作,那么该hub不理会设备发送的Chirp K信号,之后设备也不会切换到高速模式。

设备发送的Chirp K信号结束后100us内,hub必须开始回复一连串的KJKJKJ....序列,向设备表明这是一个USB2.0的hub。

这里的KJ序列是连续的,中间不能间断,而且每个K或J的持续时间在40us~60us之间。

KJ序列停止后的100~500us内结束复位操作。

hub发送Chirp KJ序列的方式和设备一样,通过电流源向差分数据线交替灌17.78mA的电流实现。

再回到设备端来。

设备检测到6个hub发出的Chirp 信号后(3对KJ序列),
它必须在500us内切换到高速模式。

切换动作有:
1.断开1.5k的上拉电阻;
2.连接D+/D-上的高速终端电阻(high-speed termination),实际上就是全速/低速差分驱动器;
3.进入默认的高速状态。

执行1,2两步后,USB信号线上看到的现象就发生变化了:hub发送出来的Chirp KJ序列幅值降到了原先的一半,400mV。

这是因为设备端挂载新的终端电阻后,配上原先hub端的终端电阻,并联后的阻抗是22.5欧姆。

400mV就是由17.78mA*22.5Ohm得来。

以后高速操作的信号幅值就是400mV而不像全速/低速那样的3V。

至此,高速设备与USB2.0 hub握手完毕,进行后续的480Mbps高速信号通信。

1.3信号测试及判断注意事项
1.高速检测握手协商是在主机发出复位(reset)信号期间,由设备发起的,由
主机响应的过程;
2.主机使用SE0状态reset设备之后需要使用高速握手协商(chirp handshake)
才可以再次正常通信;
3.主机使用全速的idle状态suspend设备之后需要通过resume过程使设备进入
工作状态,这个过程不需要高速握手协商;
4.全速/低速模式时主机resume设备的是通过保持K状态20ms;高速下这20ms
的K状态以转换成SE0状态后结束,然后主机和设备在两次低速位(2 low speed bit times)内必须保持在高速终端模式;
5.DEVICE_REMOTE_WAKEUP feature,该特性用来在设备被挂起(suspend)
后,主机可以使用resume信号来唤醒设备。

该特性是主机使用SET_FEATURE 和CLEAR_FEATURE请求对进行设置和清除的。

2 测试表格及结果分析
表1 USB chirp信号测试表:实测过程中黄色波形为D+,绿色对应D-
基于高速传输
接口电路
同步模式为实测波形的后半部分红圈所

如实测波形图,
图红圈的放大部分,可见,
1.
2.
3.
4.
800mV->400mV
800mV
电平
主机复位设备
NA
USB chirp信号测试表(续):
主机挂起设备
正常,高电平值
主机唤醒设备
NA。

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