锁相技术外文译文翻译
电影专业词典名词解释中英文对照.
电影专业词典名词解释中英文对照日期：2010-07-19 10:32:49浏览次数:5629次电影专业词典名词解释中英文翻译。
影艺学院导片学院式剪接加速蒙太奇，导演用来命令演员开始表演的口头用语。
电影在表达意念时，自觉或不自觉地产生双重或多重意义。
ABERRATION 像差摄影影头因制作不精密，或人为的损害，不能将一点所发出的所有光线聚焦于底片感光膜上的同一位置，使影像变形，或失焦模糊不清。
ABSOLUTE FILM 绝对电影一种用抽象图形来诠释音乐的影片。
由德国羊肠小道前卫电影导演奥斯卡费辛格于1925-1930年首创。
ABSTRACT FILM 抽象电影一种通过影片的剪辑、视觉技巧、声音性质、色彩形状以及韵律设计等，来表达意念，给人一种自由自在、不拘形式感觉的电影。
ACADEMIC EDITING 学院式剪接一种仔细依循电影剧情发展过程的剪接方式。
其目的是在于重建一个事件的全部过程，维持电影剧情发展的流畅性。
因这种剪接方式不会引起观众对剪接本身的注意，有时也被称为“无痕迹剪接”，是好莱坞最常用的剪接方式之一。
ACADEMY APERTURE 影艺学院片门由美国影艺学院推行的一种电影片门规格，主要是用于35毫米电影摄影机和放映机。
此种规格宽高比例为1.33：1。
亦称ACADEMY FRAME。
ACADEMY AWARDS 奥斯卡金像奖美国影艺学院于1972年设立的奖项，每年颁给表现杰出的电影工作者。
每一个奖项最多有五个提名。
个人项目奖，可以提高演员或电影工作者的身价。
ACADEMY LEADER 影艺学院导片依据影艺学院所设定的标准，连接在放映拷贝首尾的一段胶片。
导片中含有一系列倒数的数字、放映记录和其他信息，便于放映师装片和换片。
导片不仅有保护影片的功能，同时可使放映机从起动到第一格画面到达放映机片门之前，达到正常的放映速度。
ACADEMY MASK 影艺学院遮片由影艺学院规画出来的一种遮掩摄影机部分片门的装置。
电子密码锁中英文对照外文翻译文献
电子密码锁中英文对照外文翻译文献(文档含英文原文和中文翻译)2THE DESIGN OF MATRIX KEYBOARD AND LCD DISPLAY BASED ON MCUAbstractThe development of microelectronics technology and industrial measure requirement bring a good opportunity for development and research system，which makes it a broad prospects. The equipment has the advantages of small size, single power supply and a variety of output voltage leads it has a special module. Through the analysis of the hardware structure, we can summarizes each module needs.For example,we often go through the keys to realize the control of the electronic device. Small to watch mobile phone, to the TV computer, to a variety of complex instruments, all need to realize various operations through the buttons. This design is an important part of step for the further research，using buttons to control the display，include some modules like LCD 1602 liquid crystal display，4*4 matrix keyboard，STC89C52single-chip microcomputer and other bine with the Proteus software，the simulation results are displayed on the LCD in 1602 type of data.KEY WORDS: Single-chip; LCD 1602 liquid crystal display; 4*4 Matrix keyboard31 IntroductionWith the development of economy and the progress of science and technology, Microprocessors and peripheral chips have developed rapidly. The newest development of the integrated technology is the CPU chip and external. Like the program memory, data memory, parallel, serial, I/O timing / counter, interrupt controller and other control components are integrated in a chip—single chip. SCM has a manufacturing process CMOS, The smaller lithography process improves integration which make the chip space smaller, lower cost, lower working voltage, lower power consumption. Adopts double CPU structure, increasing the width of data bus, improve the speed and the ability of data processing, a pipeline structure, improve the processing and computing speed, in order to meet the needs of real-time control and processing. To increase the storage capacity, the internal EPROM EPPROM, secure program, to improve the driving capability of parallel port, in order to reduce the peripheral driving chip, increase the logic function and control the external I/O port flexibility. Peripheral in serial mode based expansion; peripheral circuit internal installation is an obvious trend to connect the internet. Reliability and application level is getting higher and higher. Some high-end microcontroller and launched in recent years also contains many special function unit, Such as A/D4converter, modem, communication controller, PLL, DMA, floating point unit etc.So,as we add some external expansion of the circuit and channel interface it can constitute a variety of computer applications, such as industrial control systems, data acquisition system, automatic test system, intelligent instrument, intelligent interface, function module etc. With MCU development and complete structure,SCM has become a powerful tool and will have a higher level and broader development.2 Design of the whole structure of systemThis design is based on single-chip, include matrix keyboard and LCD display module. Single-chip is the first model to select the appropriate target, function, reliability, cost, accuracy and speed control system. According to the actual situation of the topic selection, configuration management model different mainly from the following two aspects: First, supply chain management has strong anti-interference ability; second, SCM has a higher price. For information input module, keyboard selection can use economic benefits and meet the requirements of the 4*4 key matrix keyboard can realize multi function key requirements. As for the output module, using LCD 1602 liquid crystal display module, liquid crystal to achieve key information processing functions after the show. The circuit of the system is required by AT89C51 chip, clock circuit, reset circuit, driving circuit, scanning line5driving circuit and LCD1602 LCD screen. 4*4 matrix keyboard accessof P1.0 —P1.7,LCD 1602 screen to access P0.0—P0.7.3 System hardware circuit design3.1 Liquid crystal moduleThe principle of liquid crystal display is the use of physical properties of liquid crystal, The display control area voltage, power is displayed, it can display graphics. Liquid crystal display with thin thickness, suitable for large scale integrated circuit directly driven, easy to realize full color display characteristics, has been widely used in many fields of portable computer, digital camera, PDA mobile communication tools etc.1602 liquid crystal is also called the 1602 character LCD, which is a special used to display letters, numbers, symbols of the LCD module. It is composed of a plurality of 5X7 or 5X11 dot matrix character components, each dot matrix character who can display a character, there is a distance between the interval of each, there are intervals between each line, played the character spacing and row spacing, and because of this it is not well display graphics (with custom CGRAM, show the effect is not good). 1602 LCD refers to the display of the content for the 16X2, which can display two lines, 16 characters per line (LCD moduledisplay characters and numbers).63.2 Matrix keyboard module1. Key characteristicsThe keyboard is composed of a number of separate keys, press and release key is through the closed mechanical contact and off to achieve, because of the elastic action of mechanical contact, in the closing and the opening of the moment has a dither. Jitter must be eliminated, include software and hardware elimination.2．Scanning principleFirst determine whether a key is closed, and then one by one scan to further determine which button closure;(1) D0 ~ D3 output 0, level detection line D4 to D7. If the D4 - level D7 all high, said no key was pressed. If the D4 - level D7 is not all high, said the key was pressed.(2) If no key closure, return the scanning. If there is a button closure, in column by column scanning, closed key key number to find out. The D0=0, D1 ~ D3=1, D4 ~ D7 level, if D4=0, said the K1 key is pressed; similarly, if the D5 ~ D7=0, K5 respectively, K9, K13 key is down; if the D4 ~ D7=1, said that without a key is pressed. Then the D1=0, D0, D2, D3 was 1, the scanning of the second columns, which were carried on, until the closure of the key found.4 Software design7The software design mainly consists of keyboard scanning procedures, write instruction code program of LCD module, LCD module display data initialization code written subroutine, liquid crystal display module, liquid crystal display a character subroutine, time delay subroutine and so on. Programming for each module, software programming ended, Keil software was used for debugging, when the various parts of the program debugging is correct, according to the source sequence of calls, the parts together, compile, compile successfully downloaded to the mcu. The result is when the user presses a key, LCD display of the button is pressed after the realization of functional parameters corresponding to the. When the system power supply, P1 port scan cycle and the key button debounce, after completion of input through the SCM processing, output in the P0 port, through the liquid crystal display program content, complete system function.5 ConclusionWith the continuous development of high and new technology, the miniaturization and the miniaturization of electronic products has been achieved. And all kinds of new technology, as a single field of the new method, the development trend of new products and symbol -- intelligent significantly is one of the trends in development. The module design display microcontroller matrix keyboard and LCD, make us understand8to this technology innovation, through in-depth study on this technology, we can master the use in other areas, such as the design of electronic password lock, adjustment and control of indoor temperature and humidity, field access control system design etc.. Technological progress and economic development are the main themes of the present era, the improvement of people's living standard is bound to the requirements of electronic products increase, the design of any a small system is for a foundation, design of system innovation, the hardware, software integration, method and technology of virtual display and soft measurement artificial intelligence, I firmly believe that our life will be more colourful.9基于单片机的矩阵键盘与液晶显示的设计摘要微电子技术的发展和工业测量的需求，给系统的开发及深入研究带来了良好的契机，发展前景广阔。
锁相技术学习心得体会doc
锁相技术学习心得体会篇一：锁相技术锁相技术论文题目：专业班级：学生姓名：学号：任课老师：陈燕锁相技术的核心 XX级通信工程1班 XX 年 6 月13日摘要本文介绍了锁相技术的核心锁相环路：一个实现相位自动锁定的控制系统。
锁相环路有两个突出的特性：1是窄带滤波特性；2是宽带跟踪特性。
这两个特性使得锁相技术在电子技术领域得到了广泛的应用，特别是随着集成电路技术、数字技术以及通讯和计算机技术的发展，极大地推动了锁相技术的发展和应用。
现在锁相技术已经形成一门比较系统的理论科学，锁相技术的应用主要包含以下几个方面：跟踪滤波、频率合成与频率变换、模拟和数字信号的相干解调、数字通讯、调制与解调、检波、稳频和位频等。
下面来主要介绍一下锁相技术的核心，掌握核心就能运用得当。
关键字：核心，锁相环路，运用锁相环路的工作原理：锁相环路是一种反馈电路，锁相环的英文全称是Phase-Locked Loop,简称PLL。
其作用是使得电路上的时钟和某一外部时钟的相位同步。
因锁相环可以实现输出信号频率对输入信号频率的自动跟踪，所以锁相环通常用于闭环跟踪电路。
锁相环在工作的过程中，当输出信号的频率与输入信号的频率相等时，输出电压与输入电压保持固定的相位差值，即输出电压与输入电压的相位被锁住，这就是锁相环名称的由来。
在数据采集系统中，锁相环是一种非常有用的同步技术，因为通过锁相环，可以使得不同的数据采集板卡共享同一个采样时钟。
因此，所有板卡上各自的本地 80MHz和20MHz 时基的相位都是同步的，从而采样时钟也是同步的。
因为每块板卡的采样时钟都是同步的，所以都能严格地在同一时刻进行数据采集。
锁相环路是一个相位反馈自动控制系统。
它由以下三个基本部件组成：鉴相器（PD）、环路滤波器（LPF）和压控振荡器（VCO）。
锁相环的工作原理：1. 压控振荡器的输出经过采集并分频；2. 和基准信号同时输入鉴相器；3. 鉴相器通过比较上述两个信号的频率差，然后输出一个直流脉冲电压；4. 控制VCO，使它的频率改变；5. 这样经过一个很短的时间，VCO 的输出就会稳定于某一期望值。
电工翻译词汇C6
电工翻译词汇C6carbon humidity-dependent resistor,碳湿敏电阻器card punch,卡片穿孔机card reader,卜片阅读机Carlson type strain gauge,卡尔逊应变计carrier,载波carrier gas,载气carrier ring,夹持环carrier sense,载波侦听19carrier sense multiple access with collision detection(CSMA/CD), 具有冲突检测的载波侦听多路访问carrier sync,载波同步cartridge disk,盒式磁盘cartridge disk drive,盒式磁盘机cascade control,串级控制cascade system,串级系统cascade[inductive]voltage transformer,级联式[感应式]电压互感器case,外壳casing,外壳cassette,盒式磁带；卡式磁带；暗盒catadioptric telescope,折反射望远镜catalysis element,催化元件catalytic analyzer,催化分析器catalytic chromatography,催化色谱法catalytic gas transducer[sensor],催化式气体传感器cathode,阴极cathode of electron gun,电子枪阴极cathode ray null indicator,阴极射线指零仪cavitation,空化cavitation corrosion,气蚀cavitation noise,空化噪声ceilometer,云幂仪cell,电池；传感器cell constant,电池常数cell potential transducer[sensor],细胞电位传感器Celsius,摄氏度Celsius temperature,摄氏温度Celsius temperature scale,摄氏温标center of strike,打击中心central conductor method,中心导体法；电流贯通法central principal inertia axis,中心主惯性轴central processing unit(CPU),中央处理单元central processor,中央处理器centrality,集中性centralized control,集中控制centralized intelligence,集中智能centralized management system,集中管理系统centralized network,集中式网络centralized process control computer,集中型过程控制计算机centrifugal balancing machine,离心力式平衡机centrifugal tachometer,离心式转速表ceramic microphone,陶瓷传声器ceraunograph,雷电计20ceraunometer,雷电仪certificate of conformity,合格证书certificate of control,控制证书certification,认证certification of conformity of an instrument for explosive atmosphere,防爆合格证certification system,认证体系certified standard material,有证标准物质chained list,链接表change of temperature test,温度变化试验channel,信道；通道character,字符character code,字符码character recognition,字符识别character set,字符集；字符组character-at-time printer,一次一字符打印机[印刷机]；串行打印机characteristic curve,特性曲线characteristic "fast","快"特性characteristic "impulse","脉冲"响应特性characteristic"slow","慢"特性characteristic locus,特征轨迹characteristic impedance,特性阻抗characteristic X-ray,特征X 射线charge amplifier,电荷放大器charge neutralization,电荷中和charge sensitivity,电荷灵敏度chart,记录纸chart driving mechanism,传纸机构chart lines,记录纸分度线chart scale length,记录纸标度尺长度closed loop transfer function,闭环传递函数closed loop zero,闭环零点closed position,关闭位置closed system,封闭系统closing valve time,关阀时间closure member,截流件cloud amount,云量cloud balancer,测支平衡器cloud base,云底cloud chamber,云室；云零室cloud detection radar,测云雷达cloud direction,云向cloud height indicator,云高指示器cloud height meter,云幂仪cloud searchlight,云幂灯。
锁相技术译文翻译
锁相技术译文翻译英文原文：An On-Chip All-Digital Measurement Circuit to Characterize Phase-Locked Loop Response in 45-nm SOI译文：45纳米SOI全数字片上测量电路表征锁相环响应特性年级专业：姓名：学号：2013 年 6 月 2 日英文中文An On-Chip All-Digital Measurement Circuit to Characterize Phase-Locked Loop Response in 45-nm SOIAbstract—An all-digital measurement Circuit , built in 45-nm SOI-CMOS enabl es on-chip characterization of phase-loc ked loop (PLL) response to a self-induce d phase step.This technique allows estimationof PLL closed-loop bandwidth and jitterpeaking. The circuit canbe used to plot step-response vs.time, measure static phase error,and observe phase-lock status. INTRODUCTIONMany applications such as PCI Express ? require a PLL to produce alow-jitter cl ock at a given frequency while meeting stringent bandwidth and jitter peaking r 45纳米SOI全数字片上测量电路表征锁相环响应特性摘要---建立在45纳米的SOI-CMOS上一个全数字测量电路，它能够表征PLL对自诱导相步进的响应这项技术允许对PLL闭环带宽和抖动峰值的估计。
锁相技术译文翻译
signal, and the secondary signal is a signal with phase lagofπ/2rad to the fundamental component. The PLL methodsamong them have the potential to correctly estimate the phaseand frequency of frequency-varying single-phase signals.
Index Terms—Frequency estimation, phase estimation, phaselockedloop (PLL), single phase.
I. INTRODUCTION
PHASE, frequency, and amplitude of single-phase voltages
Paper IPCSD-07-073, presented at the 2007 Power Conversion Conference,Nagoya,Japan, April 2–5, and approved for publication in the IEEE TRANSACTIONS ONINDUSTRYAPPLICATIONSby the Industrial Power Converter Committee of the IEEE Industry Applications Society. Manuscript submitted for review April 27, 2007 and released for publication September 6, 2007.
锁相环外文翻译
外文资料Phase-locked loop Technology ：A phase-locked loop or phase lock loop (PLL) is a control system that generates a signal that has a fixed relation to the phase of a "reference" signal. A phase-locked loop circuit responds to both the frequency and the phase of the input signals, automatically raising or lowering the frequency of a controlled oscillator until it is matched to the reference in both frequency and phase. A phase-locked loop is an example of a control system using negative feedback. In the order of the PLL is the way of made the frequency stability in the send up wireless,include VCO and PLL integrated circuits,VCO send up a signal,some of the signal is output,and the other through the frequency division with PLL integrated circuits generate the local signal making compared.In the order to remain the same,it’s must be remain the phase displacement same.If the phase displacement have some changes,the output of the PLL integrated circuits have some changes too,to controlle VCO until phase diffe rence to restore,make both cotrolled oscillator’s frequency and phase with input signal which is close-loop electronic circuit keep firm relationship.Phase-locked loops are widely used in radio, telecommunications, computers and other electronic applications. They may generate stable frequencies, recover a signal from a noisy communication channel, or distribute clock timing pulses in digital logic designs such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a cycle per second up to many gigahertz.Earliest research towards what became known as the phase-locked loop goes back to 1932, when British researchers developed an alternative to Edwin Armstrong's superheterodyne receiver, the Homodyne. In the homodyne or synchrodyne system, a local oscillator was tuned to the desired input frequency and multiplied with the input signal. The resulting output signal included the original audio modulation information.The intent was to develop an alternative receiver circuit that required fewer tuned circuits than the superheterodyne receiver. Since the local oscillator would rapidly drift in frequency, an automatic correction signal was applied to the oscillator, maintaining it in the same phase and frequency as the desired signal. The technique was described in 1932, in a paper by H.de Bellescise, in the French journal Onde Electrique.In analog television receivers since at least the late 1930s, phase-locked-loop horizontal and vertical sweep circuits are locked to synchronization pulses in the broadcast signal. When Signetics introduced a line of monolithic integrated circuits that were complete phase-locked loop systems on a chip in 1969, applications for the technique multiplied. A few years later RCA introduced the "CD4046" CMOS Micropower Phase-Locked Loop, which became a popular integrated circuit. Applications：Phase-locked loops are widely used for synchronization purposes; in space communications for coherent carrier tracking and threshold extension, bit synchronization, and symbol synchronization. Phase-locked loops can also be used to demodulate frequency-modulated signals. In radio transmitters, a PLL is used to synthesize new frequencies which are a multiple of a reference frequency, with the same stability as the reference frequency.Clock recovery ：Some data streams, especially high-speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive), are sent without an accompanying clock. The receiver generates a clock from an approximate frequency reference, and then phase-aligns to the transitions in the data stream with a PLL. This process is referred to as clock recovery. In order for this scheme to work, the data stream must have a transition frequently enough to correct any drift in the PLL's oscillator. Typically, some sort of redundant encoding is used; 8B10B is very common.Deskewing ：If a clock is sent in parallel with data, that clock can be used to sample the data.Because the clock must be received and amplified before it can drive the flip-flops which sample the data, there will be a finite, and process-, temperature-, and voltage-dependent delay between the detected clock edge and the received data window. This delay limits the frequency at which data can be sent. One way of eliminating this delay is to include a deskew PLL on the receive side, so that the clock at each data flip-flop is phase-matched to the received clock. In that type of application, a special form of a PLL called a Delay-Locked Loop (DLL) is frequently used.Clock generation：Many electronic systems include processors of various sorts that operate at hundreds of megahertz. Typically, the clocks supplied to these processors come from clock generator PLLs, which multiply a lower-frequency reference clock (usually 50 or 100 MHz) up to the operating frequency of the processor. The multiplication factor can be quite large in cases where the operating frequency is multiple gigahertz and the reference crystal is just tens or hundreds of megahertz.Spread spectrum：All electronic systems emit some unwanted radio frequency energy. Various regulatory agencies (such as the FCC in the United States) put limits on the emitted energy and any interference caused by it. The emitted noise generally appears at sharp spectral peaks (usually at the operating frequency of the device, and a few harmonics).A system designer can use a spread-spectrum PLL to reduce interference with high-Q receivers by spreading the energy over a larger portion of the spectrum. For example, by changing the operating frequency up and down by a small amount (about 1%), a device running at hundreds of megahertz can spread its interference evenly over a few megahertz of spectrum, which drastically reduces the amount of noise seen by FM receivers which have a bandwidth of tens of kilohertz.中文翻译锁相环技术：锁相环或锁相回路（PLL）是一个信号控制系统，即用来锁定一系列的“参考”信号。
锁相技术译文翻译模板
is the most important part of a receiver, in which usually a Phase Locked Loop (PLL) is integrated [1], [2]. The PLL in a CDR circuit is used to regenerate the clock signal from the received data and then to recover the data. Hence, the design of a PLL in a CDR circuit turns out to be a key consideration for the design of high-speed communication systems. The jitter characteristics of PLLs are quite dependent on the loop parameters. The PLL parameters should be chosen properly so that the jitter characteristics of PLLs meet the specifications of the ITU-T G.783 recommendation [3]. Therefore, to provide CDR circuits with good jitter characteristics, one basic issue to be considered is to optimize the loop parameters of the PLL [4] The charge pump PLL is one of the most popular PLL structures since 1980s. Charge pump PLLs are widely used in state of the art CDR circuit designs, because this type of PLLs has outstanding performance. However, proper design of charge pump PLLs for good jitter transfer characteristics remains to be a problem in the existing literature, and the jitter transfer characteristics of some existing designs could not meet the specifications. Although loop parameter optimization of PLLs for jitter transfer consideration was discussed in [4], however, the method proposed in [4] cannot be used for charge pump PLLs, since charge pump PLLs exhibit different characteristics from the lag-lead type PLLs discussed in [4]. In this paper, we will propose the optimal loop parameter design method of charge pump PLLs for jitter transfer characteristic optimization. Since the 第 3 页/共 12 页