毕设外文翻译--单片机基础
单片机方面毕业设计外文文献翻译

中文译文单片机单片机也被称为微控制器(Microcontroller Unit),常用英文字母的缩写MCU表示单片机,它最早是被用在工业控制领域。
单片机由芯片内仅有CPU的专用处理器发展而来。
最早的设计理念是通过将大量外围设备和CPU集成在一个芯片中,使计算机系统更小,更容易集成进复杂的而对体积要求严格的控制设备当中。
INTEL的Z80是最早按照这种思想设计出的处理器,从此以后,单片机和专用处理器的发展便分道扬镳。
早期的单片机都是8位或4位的。
其中最成功的是INTEL的8031,因为简单可靠而性能不错获得了很大的好评。
此后在8031上发展出了MCS51系列单片机系统。
基于这一系统的单片机系统直到现在还在广泛使用。
随着工业控制领域要求的提高,开始出现了16位单片机,但因为性价比不理想并未得到很广泛的应用。
90年代后随着消费电子产品大发展,单片机技术得到了巨大提高。
随着INTEL i960系列特别是后来的ARM系列的广泛应用,32位单片机迅速取代16位单片机的高端地位,并且进入主流市场。
而传统的8位单片机的性能也得到了飞速提高,处理能力比起80年代提高了数百倍。
目前,高端的32位单片机主频已经超过300MHz,性能直追90年代中期的专用处理器,而普通的型号出厂价格跌落至1美元,最高端[1]的型号也只有10美元。
当代单片机系统已经不再只在裸机环境下开发和使用,大量专用的嵌入式操作系统被广泛应用在全系列的单片机上。
而在作为掌上电脑和手机核心处理的高端单片机甚至可以直接使用专用的Windows和Linux操作系统。
单片机比专用处理器更适合应用于嵌入式系统,因此它得到了最多的应用。
事实上单片机是世界上数量最多的计算机。
现代人类生活中所用的几乎每件电子和机械产品中都会集成有单片机。
手机、电话、计算器、家用电器、电子玩具、掌上电脑以及鼠标等电脑配件中都配有1-2部单片机。
而个人电脑中也会有为数不少的单片机在工作。
单片机毕业设计--英文翻译

附录一:中文翻译单片机的组成单片机要自动完成计算,它应该具有哪些最重要的部分呢?我们以打算盘为例计算一道算术题。
例:36+163×156-166÷34。
现在要进行运算,首先需要一把算盘,其次是纸和笔。
我们把要计算的问题记录下来,然后第一步先算163×156,把它与36相加的结果记在纸上,然后计算166÷34,再把它从上一次结果中减去,就得到最后的结果。
现在,我们用单片机来完成上述过程,显然,它首先要有代替算盘进行运算的部件,这就是“运算器”;其次,要有能起到纸和笔作用的器件,即能记忆原始题目、原始数据和中间结果,还要记住使单片机能自动进行运算而编制的各种命令。
这类器件就称为“存贮器”。
此外,还需要有能代替人作用的控制器,它能根据事先给定的命令发出各种控制信号,使整个计算过程能一步步地进行。
但是光有这三部分还不够,原始的数据与命令要输入,计算的结果要输出,都需要按先后顺序进行,有时还需等待。
如上例中,当在计算163×156时,数字36就不能同时进入运算器。
因此就需要在单片机上设置按控制器的命令进行动作的“门”,当运算器需要时,就让新数据进入。
或者,当运算器得到最后结果时,再将此结果输出,而中间结果不能随便“溜出”单片机。
这种对输入、输出数据进行一定管理的“门”电路在单片机中称为“口”(Port)。
在单片机中,基本上有三类信息在流动,一类是数据,即各种原始数据(如上例中的36、163等)、中间结果(如166÷34所得的商4、余数30等)、程序(命令的集合)等。
这样要由外部设备通过“口”进入单片机,再存放在存贮器中,在运算处理过程中,数据从存贮器读入运算器进行运算,运算的中间结果要存入存贮器中,或最后由运算器经“出入口”输出。
用户要单片机执行的各种命令(程序)也以数据的形式由存贮器送入控制器,由控制器解读(译码)后变为各种控制信号,以便执行如加、减、乘、除等功能的各种命令。
毕业设计(论文)外文原文及译文

毕业设计(论文)外文原文及译文一、外文原文MCUA microcontroller (or MCU) is a computer-on-a-chip. It is a type of microcontroller emphasizing self-sufficiency and cost-effectiveness, in contrast to a general-purpose microprocessor (the kind used in a PC).With the development of technology and control systems in a wide range of applications, as well as equipment to small and intelligent development, as one of the single-chip high-tech for its small size, powerful, low cost, and other advantages of the use of flexible, show a strong vitality. It is generally better compared to the integrated circuit of anti-interference ability, the environmental temperature and humidity have better adaptability, can be stable under the conditions in the industrial. And single-chip widely used in a variety of instruments and meters, so that intelligent instrumentation and improves their measurement speed and measurement accuracy, to strengthen control functions. In short,with the advent of the information age, traditional single- chip inherent structural weaknesses, so that it show a lot of drawbacks. The speed, scale, performance indicators, such as users increasingly difficult to meet the needs of the development of single-chip chipset, upgrades are faced with new challenges.The Description of AT89S52The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of In-System Programmable Flash memory. The device is manufactured using Atmel's high-density nonvolatile memory technology and is compatible with the industry-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89S52 provides the following standard features: 8K bytes ofFlash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.Features• Compatible with MCS-51® Products• 8K Bytes of In-System Programmable (ISP) Flash Memory– Endurance: 1000 Write/Erase Cycles• 4.0V to 5.5V Operating Range• Fully Static Operation: 0 Hz to 33 MHz• Three-level Program Memory Lock• 256 x 8-bit Internal RAM• 32 Programmable I/O Lines• Three 16-bit Timer/Counters• Eight Interrupt Sources• Full Duplex UART Serial Channel• Low-power Idle and Power-down Modes• Interrupt Recovery from Power-down Mode• Watchdog Timer• Dual Data Pointer• Power-off FlagPin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pullups.Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled.ALE/PROGAddress Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSENis activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Special Function RegistersNote that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect.User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.Timer 2 Registers:Control and status bits are contained in registers T2CON and T2MOD for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.Interrupt Registers:The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the six interrupt sources in the IP register.Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two banks of 16-bit Data Pointer Registers areprovided: DP0 at SFR address locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user should always initialize the DPS bit to the appropriate value before accessing the respective Data Pointer Register.Power Off Flag:The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set to “1” during power up. It can be set and rest under software control and is not affected by reset.Memory OrganizationMCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed.Program MemoryIf the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory.Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space.When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).MOV 0A0H, #dataInstructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).MOV @R0, #dataNote that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.Timer 0 and 1Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52.Timer 2Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON.Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.In the Counter function, the register is incremented in response to a1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.InterruptsThe AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 10.Each of these interrupt sources can be individually enabled or disabledby setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once.Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position IE.5 is also unimplemented. User software should not write 1s to these bit positions, since they may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software.The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.二、译文单片机单片机即微型计算机,是把中央处理器、存储器、定时/计数器、输入输出接口都集成在一块集成电路芯片上的微型计算机。
单片机书英译汉

本科生毕业设计(翻译)Chapter2 Overview About MicrocontrollersA microcontroller is a single-chip device that contains memory for program information and data. It can perform the operation logic of programming a control process, reading inputs, manipulating and sending output; namely, it has build-in interfaces for input/output (I/O) as well as a central processing unit (CPU). Thus the microcontroller id often know as microcontroller unit (MCU) and the built-in interface capability is designed for connection with sensors, actuators and communications with other devices, and so on. In practice, a microcontroller chip has other chips in addition to itself. They are called support chips will be embedded into the microcontroller chip in the future, namely, become part of the microcontroller chip.Microcontrollers are one kind of microprocessors involved in the special direction-they are highly integrated and they remit the increased computing power. They are developed CPU chips with built-in memory and interface circuits. This results in the situation that more microcontrollers are sold than powerful microcomputers, because they are used in many machines, instruments, and consumer products.In this chapter an overview of microcontroller from many viewpoints, including internal organization, normal types, basic design structure, material-structure styles, operation process, working cycles, working conditions, memory types and software, is shortly described. Finally, as an example, a typical microcontroller single-chip of type 80C51 is sketched.2.1 Normal Configurations Of MicrocontrollersA single chip of microcontroller basically consists of the following internal function blocks.1. CPU playing a role as a brain and heart, under the control of whichsome necessary blocks are working.2. Energy management system receiving the externally provided energy from power supply and allocating them to the internal function blocks for their usages.3. Clock and timing system providing a clock signal with constant frequency, under the help of external oscillation system, for the operation process to hold the entire process in a synchronous state.4. Reset control system leading the operation logic back to the initial state or holding the operation logic at the initial state.5. Control logic memory storing the internal data programs or instructions which indicate the CPU how to guide the operation process.6. Variable area storing the internal data produced during the operation process.The most basic principle of internal configurations and connections are shown as Figure 2.1.The group of microcontrollers, normally called “single chips”,has various kinds. They have differences in volumes, forms, leg numbers, functions, characteristics, etc., and can be principally divided into three large classes called “embedded microcontrollers”, having their common essentiality, as well as their own special points in characters, structures, functions and application ranges. Some of them can replace each other by only adding a little development, but some of them have their own special advantages and disadvantages which can’t be found in othersEach class of microcontrollers mentioned above will be described shortly later.2.1.1 Embedded MicrocontrollerEmbedded microcontrollers cover a very wide range. Their common character is that a single chip contains almost all necessary functions such asdata storage, input and output interfaces designed for its independent work, thus, to drive an embedded microcontroller to start to work, a user only needs to supply an electrical power and a clock system to it.An embedded microcontroller can be a single chip based on a microprocessor criterion already set up, also can be a system set up by using a microcontroller criterion. So it can implement a lot of functions, for example, a single task in a single chip.An elementary role played by the embedded microcontrollers is supplying inexpensive programmable logical controllers and interfaces. Thus, they needn’t to have high degree completed functio ns, but they can implement very complex control combinations according to different requests.Generally the embedded microcontrollers have the following common characteristics:1. Holding a CPU (as mentioned above).2. Possess the reset (as mentioned above) capability.3. Possess the ability of internal clock timing (timing the operation logic by using internal clock).4. Having control memories and program input terminals.5. Having variable areas.6. Having I/O (input/output) pins.7. Having instruction cycle timer.The expended set based on the primary chip mentioned above can satisfy the basic requirements of a computer system, and all added functions listed below are realized through their I/O pins:Internally installed monitor/debug programs.1. The ability to program the internal control memories-this is implemented by using a directing control of a mainframe.2. The abilities of interrupt stimulated by different interrupt sources.3. I/O interface for analog and digital signals.4. Serial I/O (synchronous and asynchronous) interfaces.5. Parallel I/O interfaces.6. Interfaces for external memories.The characteristics listed above make the microcontrollers more flexible, easier to be used and able to realize many developing tasks which seems unable to realize.2.1.2 External Storage MicrocontrollerThe basic structure of external storage microcontrollers can be shown as Figure 2.2.A typical application of external storage microcontrollers is being used as a service device to fetch and temporarily store the data for the main memory. They rationally distribute and temporarily store a lot of data, and can work at a quite high speed than the embedded microcontrollers.Most external storage microcontrollers possess 16-bit or 32-bit channels. They have external memories for storing the operation programs. Their operations fully depend upon their external memories which include control memories and all variable memories required for the microcontrollers.The typical type of external storage microcontrollers is type 80188, made by Intel. The basic body of type 80188 is the type 8088 used in IBM PC and their compatible types. Based on 8088, some circuits are added to the chip to supply some typical functions implemented in application of microcontrollers.The purpose of developing the 80188 is to provide a set of integrated soft-shells for the users. The 80188 includes all required circuit functions provided for application technology development engineer.2.1.3 Digital Signal Processor (DSP)This is a kind of relatively new processors playing a role in sampling data from analog signals, and calculating out the corresponding values.DSP S and their arithmetic and logic units (ALU) operate at very high speed, so that real-time control can be realized, and they involve a variety of mathematic algorithm systems so that they are very welcome in high-level science and technology fields.DSP S are often used to eliminate noises for the equipments, such as the microphone in airplanes, or the signal processors in TV Centers, owing to their high speed and mathematic functions.The DSP algorithm development is a special science field, especially is an important branch of control theory requiring quite high-level mathematics, for example, the Fuzzy Logics, a non-classical mathematics, supporting computer system control.DSP S include multiplex kinds. All of them have the common features which can be found in embedded microcontrollers and external storage microcontrollers. DSP S share typically not used alone, but combined in a system organized by a center control devices such as microcontroller, or with the help of a interface connection element.DSP S are generally used to control the external digital hardware, or process input signal and structure output signal in the description form which consist of equations.2.2 Basic Design Structures Of MicrocontrollersThe microcontrollers belong to the large family of single chip digital processors, so the hardware and software structure class of the former equivalent to the later. Their software structures include RISC structure and CISC structure, and hardware structures include Princeton structure andHarvard structure.2.2.1 Basic Instruction Structures Of CISC And RISCCISC structure refers to a kind of structure of Complex Instruction Set Computer. RISC structure refers to a kind of Reduced Instruction Set Computer. The main difference between them consists in the instruction structures. In the following differentiations and comparisons between them are discussed.1. Operation speedUsually, the operation speed of RISC is higher than CISC, though some processors of CISC type are regarded as one of RISC-like type. Many processors of CISC type implement the operation code with higher speed than the processors of RISC type, or implement some higher level technologies, which the RISC type can not realize.2. Instruction storage and implementationIn CISC, usually a lot of instructions are stored in the processors, and implement different steps of a single operation, such as direct data fetching out or filling in, and symbol register test. Each operation to be implemented requires an instruction-combination arranged by the designer.In RISC, usually each instruction stored in the processor exists as a least unit basing on which the user himself designs the required operations; this isn’t done by the designer.For example ,a STACK process includes two operation sets, PUSH and POP. The PUSH operation set is implemented at the start of a interrupt process and consists of putting all related data, addresses and state symbols, orderly, to the stack registers where they will stay, POP operation is implemented after the interrupt process and consists of putting all related data, addresses and state symbols, in opposite order, from the stack register, where they stays. Implementing all operations in RISC processors mentioned aboverequire only two instructions: “take out data from register” and “put data into register”, but a lot of programming tasks done by the user, meanwhile, in CISC processors, two instructions are required for implementing all the same operation, POP and PUSH, which are designed and programmed by the designer and then supplied to the users as a product.Basic Hardware Structures: Harvard Structure and Princeton StructureThe Harvard and Princeton structure are two computer hardware structures established by the expert of Harvard University and Princeton University in 1970 to satisfy the public requirement, in order to suit the high operation speed and variations of environment conditions.The principle of Princeton structure is shown as in Figure2.3. In this structure a common memory is arrayed, in order to store the control program and the data structure, such as variables and stack. In this structure a memory interface is used to construct an arbitrary channel, directing to the memory space, for supporting the data transmission between the processor and the internal registers.The problem of Princeton structure is “bottle neck” effect which appears when data of many channels are taken out or put in within a short time, so that the data flow is resisted.In the Harvard structure, shown in Figure 2.4, there are flexible connections and interfaces among the processor, control memory, register space and stack, as a result, the “bottle neck” effect and the data resistance can be avoided, the advantage of Princeton structure often can be shown when a set of complex operation system is to be implement.2.3 Chip Technology Of PMOS、NMOS、BMOS And CMOSAlong with the development of manufacture, like all other electronic products, the microcomputers have been growing smaller and smaller, running faster an faster, consuming less and less power, and becomingcheaper and cheaper, primarily due to improvements in the manufacturing processes and technologies, especially in the material processing technologies. The “CMOS” logic technology, a currently widely used material processing technique for microcontrollers, has made a large contribution to provide the computer functions and electrical interfaces. This is primarily a “push-pull”technology combining a “PMOS” and“NMOS” transistor together shown in Figure 2.5. It consists in a CMOS inverter working as a “NOT” gate, where the PMOS transistor is conducted(or“on”) and the NMOS transistor is blocked(or “off”), when the input signal is a low voltage level. Namely, the transistor, playing the role as a “switch” at V CC will be “on”, supplying V CC to the signal output responding to an input signal held on low voltage level. Contrarily, when receiving a signa l “high”, the NMOS transistor will be turn on, pulling the output line to GROUND (marked as GND) to provide an output signal “low”. The full names of the three terms mentioned are given below.1. PMOS or NMOS-P- channel Metal Oxide Semiconductor. This material technology was earlier used in the microprocessor manufacture history for microcomputers of types PMOS and NMOS.2. BMOS-Bipolar Metal Oxide Semiconductor. This technology includes BINMOS (Bipolar NMOS) and BIPMOS.3. CMOS-Complementary Metal Oxide Semiconductor. In this logic technique advantages of two silicon crystal structure types are optimally developed in combination, as shown in Figure 2.5, so the microcomputers have the advantages such as low power consumption, micro value, high operation speed and large capacity.Getting into the chip technologies deeper and deeper, some important terms and problems, mentioned below, can be explained more and more clearly.1. Power consumption and working frequencyDuring a state transition mentioned above, the amount of current flowing through the transistor is very small. As the working frequency increase, the current flows more often in a given time period, so that the average current, namely power consumption of device, must go up.2. Sleep modeIn this working mode no input signal is received, or no operation reacts to any input signal, namely no gates are switching so that no current flows through the device, thus the power consumption falls nearly to zero.3. Signal switching pointBefore using any devices, it is important to check if the input signal switching point matches the input threshold level of the device. For CMOS devices this is, typically, 1.4 V to one-half of V CC, but it can be different from types.4. High-and low-voltage levelCMOS can interface directly with most positive logic technologies, where logic value“1”is represented by high-voltage level, and logic value“0”-by low. Thus, it is important to make sure that a high-voltage level can be differentiated from a low in all circumstances, i. e., a “high” input is always above the voltage-switching threshold level,2.4 Basic Operation Process Of MicrocontrollersThe most basic operation process of a microcontroller consists of the following steps shown as in Figure 2.6.1. Instruction fetching-The CPU takes out an instruction from one of the rooms of internal or external control memory, ROM, according to the address calculated in the last step and recognizes the contents of the instruction.2. Instruction number calculating-The instruction number calculator of the CPU calculates the instruction number, namely, adds 1 to the number calculated in the last step.3. Instruction implementing-The operation system controlled by CPU implements the operation under the guiding of the content of the instruction.4. Address calculating-The address calculator calculates the next address, namely, plus an address increment to the last calculated address.5. Repeating-Going back to step 1 and starting the next cycle.All steps of a process are controlled by the operating logical control system and synchronized by the timing system with the help of an internally or externally supported clock system.2.5 Cycles Running In MicrocontrollersUsually there are 5 concepts of cycles defined for describing the implementation process of a microcontroller: clock cycle, machine cycle, instruction cycle, taps cycle (P cycle) and state cycle (S cycle). A short description will be given for each one as fellows.Clock cycle is the least basic cycle, called cycle of clock pulse as well. This cycle is produced internally or externally by an oscillation circuit such as crystal oscillator system, driven by an internal electronic energy source circuit, and equals to a natural cycle of the oscillation element.Machine cycle means a time interval for implementing a basic operation step.Instruction cycle refers to needed time interval for implementing an instruction.Tap cycle, marked as “P”, refers to a time interval, which equals to N *(clock cycle), where N is an integer.State Cycle, marked as “S”, is defined as 1 clock cycle and equals to 2 Ps.C51. If a crystal element of working frequency, 1 MHz, is selected to be used in the clock system, then 1 clock cycle equals to 1 us, 1 machine cycle is defined as 12 clock cycles and equals to 12 us; 1 instruction cycle Equals to 1 or 2 machine cycle(s) depending on the instruction lengthand mode, and equals to 12 or 24 clock cycles, i.e. 12 or 24 us.2.6 Basic Working Conditions And Center Function BlocksThe basic hardware-conditions for normally running an essential microcontroller system, or called least microcontroller system, configured according the basic conditions, are shown in Figure 2.7 based on an example of 80C51 microcontroller chip. In the essential system each peripheral element and related circuit plays a role in insuring and protesting normal operation of the microcontroller.2.6.1 PowerVirtually all microcontrollers today are built by using CMOS technology. They require significantly less power than the older, but usually use batteries and relies on “super-capacitors” for safe operation during power outages, thus minimizing power consumption becomes important. There are three conditions to be considered.1. Intrinsic power-the power required only for running the microcontroller.2. I/O Drive Power-the power taken into account for the power consumption when the microcontroller is sinking the current from or raising the current to external I/O devices.3. Sleep/Standby power-the power used when the microcontroller stays in “sleep”/“standby” state and is waiting for a specific external event.Many chips have robust power handling circuitries to fit the wide variety of different applications and power sources, ranging from 1 V to 6V.Different terms can be used to describe powers of different devices (Figure 2.7 shown above), such as V CC or V DD:high level, usually ranging from +2 V TO +5 V, V SS or GND (Ground).When applying a microcontroller, an important problem to consider isprotesting the power supply input from the complex power environment disturbance. A practical and reliable resolution is to use a tantalum capacitor of about 0.1 uF installed between the V CC (V DD) and GND (like C2 and C3) to filter the high frequency part of the input voltage, so that the device can handle great I/O current transients without causing inadvertent resets or data corruption. C3is designed for avoiding inductance effect which often happens because of the disturbance of high frequency radio wave.2.6.2 ResetIn order to ensure a microcontroller to run at a valid power conditions, a reset system such as the one consists of C1,R1, and S1 shown in Figure 2.7, are usually set up at the chip connected with its RESET-leg. This enables the chip to have two functions: restart function and power on stay function, detailed as fellows.1. Restart functionThis function performs the following process:If the switch, S1, is turned on when the chip is running, the connection between V CC and RESET pin leads the current flowing from V CC to the pin, so that the pin holds on a higher level and the operation logic of the chip turns back to initial state, or say, the address pointer of operation logic turns to initial address. Through the manual turning on of S1, the operation logic can get out from the tangle, such as unlimited cycle caused by external disturbance.2. Power on delay functionThis function performs the following process:At the moment when the power supply is turned on, the charging of C1 through R1leads a current flowing from RESET leg to V CC, and set the RESET pin on the high level, so that a RESET process like the one mentioned above happens, and the initial state is held until the charging isfinished and the current disappears. This process can hold the operation logic delaying at initial state, until the power condition get into stable state.2.6.3 System Clock/OscillatorsWhen running, each operation step of a microcontroller must follow an accurate time order system based on an externally or internally provided stable pulse series with constant frequency like a clock. The system, providing such pulse series, called clock signal system, or simply-“clock”, consists in an oscillator circuit driven (shown in Figure 2.7, where C L is a crystal oscillator, C4 and C5 are load for holding the oscillator system stable) by an energy source which vibrates sympathetically with the circuit and provides energy for it.Most microcontrollers are designed to be able to run within wide frequency band: from 0 to 100 GHz, the practical value of which is determined by the selected frequency value of the crystal oscillator.Another methods used for providing clocks are “RC oscillator” and an arbitrary external circuit or element, which provides a stable clock signal series. The first one uses the characteristic rise/fall time of a RC network, thus, it is the cheapest one, but not accurate enough.Some microcontrollers have internal RC or “ring”oscillators without any external parts, usually enabled by a configuration register programmed with the control store.2.6.4 Level-And-Phase Converting ElementIn order to connect the microcontrollers(using CMOS communication protocol with the logical“0”:low level normally) with personal computer or other equipment(using RS-232 communication protocol with the logical“1”:-8~ -12 V,a nd logical“0”:+8~ +12V, normally), a potential-and-phase converting element is used to convert the serial signals of CMOS protocolsystem, coming from or going tip microcontrollers, into one of RS-232 protocol system, going to or coming from personal computer or other 232-type equipments(Figure 2.7,C V).2.6.5 Latch ElementWhen being used in parallel communication bus, the latch element (Figure 2.7, K C) functions as a relay station serving for address lines to hold the address data temporarily when the address lines work as data lines temporarily. This will be detailed in the following lessons.2.6.6 Timing Monitor Equipment (Watchdog)An external equipment or internal function block called Timing Monitor (Watchdog) is used for microcontroller. This element or function block can lead the operation process back to its initial state by implementing their counter and overflow signal if the operation system runs into unlimited repetition state or wrong path state accidentally, and disable this function by “clear up” signal sent by microcontroller, if it runs normally.The external and internal Watchdogs play the same role for causing a reset operation of the microcontroller. This is performed when the Watchdog is not updated within a predetermined time interval (usually from milliseconds to several seconds).Effective applications of a microcontroller are determined by its rational operation, and the later is based on the intelligent constitution of operations of all functional blocks built in the microcontroller. In the following the basic functional blocks of microcontrollers will be typically introduced.第二章微控制器的概述微控制器是一个用于存储程序信息和数据的单芯片器件。
单片机基础毕业设计外文翻译

本科生毕业设计(论文)外文翻译毕业设计题目:外文题目:Fundamentals of Single-chip Microcomputer 译文题目:单片机基础学院:信息科学与工程学院专业班级:电子信息工程0802班学生姓名:指导教师:外文原文Fundamentals of Single-chip MicrocomputerDr. Dobbs MacintoshJournalAbstractT h e s i n gl e-chi p m i c r o com pu t er i s t h e cul m i na t i on of bo t h t h e d e v el opm e nt o f t h e di gi t al c om p ut e r a nd t h e i nt e gra t e d c i r c ui t a rgu a b l y t h e t ow m o st s i gn i fi c ant i nv en t i on s of t h e 20t h ce n t u r y .T h es e t o w t yp e s o f a rc hi t e c t u r e a r e fo un d i n s i n gl e-c hi p m i c r o com pu t e r.S om e e m p l o y t h e s pl i t p ro gr a m/d at a m em o r y o f t h e H a r v a rd a r ch i t e ct u r e, s ho wn i n F i g.3-5A-1, ot h er s f o l l o w t he p hi l o so ph y,w i d e l y a d a p t ed f o r ge n e r al-pu rp os e com p ut e rs and m i c r op r oc e s s o rs,of m ak i n g n o l o gi c al di s t i nc t i on be t w ee n p ro gr a m a n d d at a m em o r y a s i n t h e P r i n c et on ar c hi t e ct u r e.In ge n e r a l t er m s a si n gl e-c hi p m i cro c om put e r i s c ha r ac t e ri z ed b y t h e i n co r po r at i o n o f al l t h e u ni t s o f a c om put e r i n t o a s i n gl e d e vi c e.Keyword: Single-chip Microcomputer ROM RAM Programming Algorithm Features• Compatible with MCS-51™ Products• 4K Bytes of In-System Reprogrammable Flash Memory– Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-level Program Memory Lock• 128 x 8-bit Internal RAM• 32 Programmable I/O Lines• Two 16-bit Timer/Counters• Six Interrupt Sources• Programmable Serial Channel• Low-power Idle and Power-down ModesDescriptionThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard MCS-51 instruction set and pinout. Theon-chipFlash allows the program memory to be reprogrammed in-system or by a conventionalnonvolatile memory programmer. By combining a versatile 8-bit CPU with Flashon a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which providesa highly-flexible and cost-effective solution to many embedded control applications.The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bittimer/counters, a five vector two-level interrupt architecture,a full duplex serial port, on-chip oscillator and clock circuitry.In addition, the AT89C51 is designed with static logicfor operation down to zero frequency and supports twosoftware selectable power saving modes. The Idle Modestops the CPU while allowing the RAM, timer/counters,serial port and interrupt system to continue functioning. ThePower-down Mode saves the RAM contents but freezesthe oscillator disabling all other chip functions until the nexthardware reset.Pin ConfigurationsBlock DiagramPin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as highimpedanceinputs.Port 0 may also be configured to be the multiplexed loworderaddress/data bus during accesses to external programand data memory. In this mode P0 has internalpullups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during program verification.Port 1Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-orderaddress bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:Port 3 also receives some control signals for Flash programmingand verification.ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory.When theAT89C51 is executing code from external programmemory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.Idle ModeIn idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes programexecution,from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Figure 1. Oscillator ConnectionsFigure 2. External Clock Drive ConfigurationPower-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.Program Memory Lock BitsOn the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below.When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.Programming the FlashThe AT89C51 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The low-voltage programming mode provides a convenient way to program theAT89C51 inside the user’s system, while the high-voltage programming mode is compatible with conventional thirdparty Flash or EPROM programmers. The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table.The AT89C51 code memory array is programmed byte-bybyte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode.Programming Algorithm: Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps.1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines.3. Activate the correct combination of control signals.4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms.Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.Ready/Busy: The progress of byte programming can also be monitored by theRDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.Chip Erase: The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows.(030H) = 1EH indicates manufactured by Atmel(031H) = 51H indicates 89C51(032H) = FFH indicates 12V programming(032H) = 05H indicates 5V programmingProgramming InterfaceEvery code byte in the Flash array can be written and the entire array can be erasedby using the appropriate combination of control signals. The write operation cycle is selftimed and once initiated, will automatically time itself to completion. All major programming vendors offer worldwide support for the Atmel microcontroller series. Please contact your local programming vendor for the appropriate software revision.外文资料翻译译文单片机基础摘要:单片机是电脑和集成电路发展的巅峰,有据可查的是它们也是20世纪最意义的两大发明。
单片机毕业设计外文翻译--单片机和keil

附录A 外文文献The SCM and µVision2一、Principle of MCUSingle-chip is an integrated on a single chip a complete computer system. Even though most of his features in a small chip, but it has a need to complete the majority of computer components: CPU, memory, internal and external bus system, most will have the Core. At the same time, such as integrated communication interfaces, timers, real-time clock and other peripheral equipment. And now the most powerful single-chip microcomputer system can even voice, image, networking, input and output complex system integration on a single chip.Also known as single-chip MCU (Microcontroller), because it was first used in the field of industrial control. Only by the single-chip CPU chip developed from the dedicated processor. The design concept is the first by a large number of peripherals and CPU in a single chip, the computer system so that smaller, more easily integrated into the complex and demanding on the volume control devices. INTEL the Z80 is one of the first design in accordance with the idea of the processor, From then on, the MCU and the development of a dedicated processor parted ways.Early single-chip 8-bit or all of the four. One of the most successful is INTEL's 8031, because the performance of a simple and reliable access to a lot of good praise. Since then in 8031 to develop a single-chip microcomputer system MCS51 series. Based on single-chip microcomputer system of the system is still widely used until now. As the field of industrial control requirements increase in the beginning of a 16-bit single-chip, but not ideal because the price has not been very widely used. After the 90's with the big consumer electronics product development, single-chip technology is a huge improvement. INTEL i960 Series with subsequent ARM in particular, a broad range of applications, quickly replaced by 32-bit single-chip 16-bit single-chip high-end status, and enter the mainstream market. Traditional 8-bit single-chip performance has been the rapid increase in processing power compared to the 80's to raise a few hundred times. At present, the high-end 32-bit single-chip frequency over 300MHz, the performance of the mid-90's close on the heels of a special processor, while the ordinary price of the model dropped to one U.S. dollars, the most high-end models, only 10 U.S. dollars. Contemporary single-chip microcomputer system is no longer only the bare-metal environment in the development and use of a large number of dedicated embedded operating system is widely used in the full range of single-chip microcomputer. In PDAs and cell phones as the core processing of high-end single-chip or even a dedicated direct access to Windows and Linux operating systems.More than a dedicated single-chip processor suitable for embedded systems, so it was up to the application. In fact the number of single-chip is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will have a single-chip integration. Phone, telephone, calculator, home appliances, electronic toys, handheld computers and computer accessories such as a mouse in the Department are equipped with 1-2 single chip. And personal computers also have a large number of single-chip microcomputer in the workplace. Vehicles equipped with more than 40 Department of the general single-chip, complex industrial control systems and even single-chip may have hundreds of work at the same time! SCM is not only far exceeds the number of PC and other integrated computing, evenmore than the number of human beings.Hardwave introductionThe 8051 family of micro controllers is based on an architecture which is highly optimized for embedded control systems. It is used in a wide variety of applications from military equipment to automobiles to the keyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 8051 family of microcontrollers is available in a wide array of variations from manufacturers such as Intel, Philips, and Siemens. These manufacturers have added numerous features and peripherals to the 8051 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs. Variations of the 8051 with clock speeds up to 40MHz and voltage requirements down to 1.5 volts are available. This wide range of parts based on one core makes the 8051 family an excellent choice as the base architecture for a company's entire line of products since it can perform many functions and developers will only have to learn this one platform.The basic architecture consists of the following features:·an eight bit ALU·32 descrete I/O pins (4 groups of 8) which can be individually accessed·two 16 bit timer/counters·full duplex UART·6 interrupt sources with 2 priority levels·128 bytes of on board RAM·separate 64K byte address spaces for DATA and CODE memoryOne 8051 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods is used for a special function by the 8051 core such as op code fetches and samples of the interrupt daisy chain for pending interrupts. The time required for any 8051 instruction can be computed by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in question. Therefore, if you have a system which is using an 11.059MHz clock, you can compute the number of instructions per second by dividing this value by 12. This gives an instruction frequency of 921583 instructions per second. Inverting this will provide the amount of time taken by each instruction cycle (1.085 microseconds).二、etting Started with µVision2The Keil Software 8051 development tools listed below are programs you use to compile your C code, assemble your assembly source files, link and locate object modules and libraries, create HEX files, and debug your target program.µVision2 for Windows™ is an In tegrated Development Environment that combines project management, source code editing, and program debugging in one single, powerful environment.The C51 ANSI Optimizing C Cross Compiler creates relocatable object modules from your C source code.The A51 Macro Assembler creates relocatable object modules from your 8051 assembly source code.The BL51 Linker/Locator combines relocatable object modules created by the C51 Compiler and the A51 Assembler into absolute object modules.The LIB51 Library Manager combines object modules into libraries that may be used by the linker.The OH51 Object-HEX Converter creates Intel HEX files from absolute object modules.The RTX-51 Real-time Operating System simplifies the design of complex, time-critical software projects.Software Development CycleWhen you use the Keil Software tools, the project development cycle is roughly the same as it is for any other software development project.1. Create a project, select the target chip from the device database, and configure the tool settings.2. Create source files in C or assembly.3. Build your application with the project manager.4. Correct errors in source files.5. Test the linked application.µVision2 IDEThe µVision2 IDE combines project management, a rich-featured editor with interactive error correction, option setup, make facility, and on-line help. Use µVision2 to create your source files and organize them into a project that defines your target application. µVision2 automatically compiles, assembles, and links your embedded application and provides a single focal point for your development efforts.LIB51 Library ManagerThe LIB51 library manager allows you to create object library from the object files created by the compiler and assembler. Libraries are specially formatted, ordered program collections of object modules that may be used by the linker at a later time. When the linker processes a library, only those object modules in the library that are necessary to create the program are used.BL51 Linker/LocatorThe BL51 linker creates an absolute object module using the object modules extracted from libraries and those created by the compiler and assembler. An absolute object file or module contains no relocatable code or data. All code and data reside at fixed memory locations. The absolute object file may be used:To program an EPROM or other memory devices,With the µVision2 Debugger for simulation and target debugging,With an in-circuit emulator for the program testing.µVision2 DebuggerThe µVision2 symbolic, source-level debugger is ideally suited for fast, reliable program debugging. The debugger includes a high-speed simulator that let you simulate an entire 8051 system including on-chip peripherals and external hardware. The attributes of the chip you use are automatically configured when you select the device from the Device Database.The µVision2 Debugger provides several ways for you to test your programs on real target hardware:Install the MON51 Target Monitor on your target system and download your program using the Monitor-51 interface built-in to the µVision2 Debugger.Use the Advanced GDI interface to attach use the µVision2 Debugger front end with your target system.Monitor-51The µVision2 Debugger supports target debugging using Monitor-51. The monitor program resides in the memory of your target hardware and communicates with the µVision2 Debugger using the serial port of the 8051 and a COM port of your PC. With Monitor-51, µVision2 lets you perform source-level, symbolic debugging on your target hardware.RTX51 Real-Time Operating SystemThe RTX51 real-time operating system is a multitasking kernel for the 8051 microcontroller family. The RTX51 real-time kernel simplifies the system design, programming, and debugging of complex applications where fast reaction to time critical events is essential. The kernel is fully integrated into the C51 Compiler and is easy to use. Task description tables and operating system consistency are automatically controlled by the BL51 linker/locator.C51 Optimizing C Cross CompilerThe Keil C51 Cross Compiler is an ANSI C Compiler that was writtenspecifically to generate fast, compact code for the 8051 microcontroller family.The C51 Compiler generates object code that matches the efficiency and speed of assembly programming.Using a high-level language like C has many advantages over assembly language programming:Knowledge of the processor instruction set is not required. Rudimentary knowledge of the memory structure of the 8051 CPU is desirable (but not necessary).Details like register allocation and addressing of the various memory types and data types is managed by the compiler.Programs get a formal structure (which is imposed by the C programming language) and can be divided into separate functions. This contributes to source code reusability as well as better overall application structure.The ability to combine variable selection with specific operations improves program readability.Keywords and operational functions that more nearly resemble the human thought process may be used.Programming and program test time is drastically reduced.The C run-time library contains many standard routines such as: formatted output, numeric conversions, and floating-point arithmetic.Existing program parts can be more easily included into new programs because of modular program construction techniques.The language C is a very portable language (based on the ANSI standard) that enjoys wide popular support and is easily obtained for most systems.Existing program investments can be quickly adapted to other processors as needed.Code OptimizationsThe C51 Compiler is an aggressive optimizing compiler that takes numerous steps to ensure that the code generated and output to the object file is the most efficient (smallest and/or fastest) code possible. The compiler analyzes the generated code to produce the most efficient instruction sequences. This ensures that your C program runs as quickly and effectively as possible in the least amount of code space.The C51 Compiler provides nine different levels of optimizing. Each increasing level includes the optimizations of levels below it. The following is a list of all optimizations currently performed by the C51 Compiler.General OptimizationsConstant Folding: Constant values occurring in an expression or address calculation are combined as a single constant.Jump Optimizing: Jumps are inverted or extended to the final target address when the program efficiency is thereby increased.Dead Code Elimination: Code that cannot be reached (dead code) is removed from the program.Register Variables: Automatic variables and function arguments are located in registers whenever possible. No data memory space is reserved for these variables.⌝Parameter Passing Via Registers: A maximum of three function arguments⌝may be passed in registers.Global Common Subexpression Elimination: Identical subexpressions or address calculations that occur multiple times in a function are recognized and calculated only once whenever possible.Common Tail Merging: Common instruction blocks are merged together using jump instructions.Re-use Common Entry Code: Common instruction sequences are moved in front of a function to reduce code size.二、Principle of MCUSingle-chip is an integrated on a single chip a complete computer system. Even though most of his features in a small chip, but it has a need to complete the majority of computer components: CPU, memory, internal and external bus system, most will have the Core. At the same time, such as integrated communication interfaces, timers, real-time clock and other peripheral equipment. And now the most powerful single-chip microcomputer system can even voice, image, networking, input and output complex system integration on a single chip.Also known as single-chip MCU (Microcontroller), because it was first used in the field of industrial control. Only by the single-chip CPU chip developed from the dedicated processor. The design concept is the first by a large number of peripherals and CPU in a single chip, the computer system so that smaller, more easily integrated into the complex and demanding on the volume control devices. INTEL the Z80 is one of the first design in accordance with the idea of the processor, From then on, the MCU and the development of a dedicated processor parted ways.Early single-chip 8-bit or all of the four. One of the most successful is INTEL's 8031, because the performance of a simple and reliable access to a lot of good praise. Since then in 8031 to develop a single-chip microcomputer system MCS51 series. Based on single-chip microcomputer system of the system is still widely used until now. As the field of industrial control requirements increase in the beginning of a 16-bit single-chip, but not ideal because the price has not been very widely used. After the 90's with the big consumer electronics product development, single-chip technology is a huge improvement. INTEL i960 Series with subsequent ARM in particular, a broad range of applications, quickly replaced by 32-bit single-chip 16-bit single-chip high-end status, and enter the mainstream market. Traditional 8-bit single-chip performance has been the rapid increase in processing power compared to the 80's to raise a few hundred times. At present, the high-end 32-bit single-chip frequency over 300MHz, the performance of the mid-90's close on the heels of a special processor, while the ordinary price of the model dropped to one U.S. dollars, the most high-end models, only 10 U.S. dollars. Contemporary single-chip microcomputer system is no longer only the bare-metal environment in the development and use of a large number of dedicated embedded operating system is widely used in the full range of single-chip microcomputer. In PDAs and cell phones as the core processing of high-end single-chip or even a dedicated direct access to Windows and Linux operating systems.More than a dedicated single-chip processor suitable for embedded systems, so it was up to the application. In fact the number of single-chip is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will have a single-chip integration. Phone, telephone, calculator, homeappliances, electronic toys, handheld computers and computer accessories such as a mouse in the Department are equipped with 1-2 single chip. And personal computers also have a large number of single-chip microcomputer in the workplace. Vehicles equipped with more than 40 Department of the general single-chip, complex industrial control systems and even single-chip may have hundreds of work at the same time! SCM is not only far exceeds the number of PC and other integrated computing, even more than the number of human beings.Hardwave introductionThe 8051 family of micro controllers is based on an architecture which is highly optimized for embedded control systems. It is used in a wide variety of applications from military equipment to automobiles to the keyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 8051 family of microcontrollers is available in a wide array of variations from manufacturers such as Intel, Philips, and Siemens. These manufacturers have added numerous features and peripherals to the 8051 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs. Variations of the 8051 with clock speeds up to 40MHz and voltage requirements down to 1.5 volts are available. This wide range of parts based on one core makes the 8051 family an excellent choice as the base architecture for a company's entire line of products since it can perform many functions and developers will only have to learn this one platform.The basic architecture consists of the following features:·an eight bit ALU·32 descrete I/O pins (4 groups of 8) which can be individually accessed·two 16 bit timer/counters·full duplex UART·6 interrupt sources with 2 priority levels·128 bytes of on board RAM·separate 64K byte address spaces for DATA and CODE memoryOne 8051 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods is used for a special function by the 8051 core such as op code fetches and samples of the interrupt daisy chain for pending interrupts. The time required for any 8051 instruction can be computed by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in question. Therefore, if you have a system which is using an 11.059MHz clock, you can compute the number of instructions per second by dividing this value by 12. This gives an instruction frequency of 921583 instructions per second. Inverting this will provide the amount of time taken by each instruction cycle (1.085 microseconds).附录B 中文译文单片机和keil一、单片机原理单片机是指一个集成在一块芯片上的完整计算机系统。
单片机毕业设计外文翻译10

一、外文原文:The single slice machine is also called tiny controller, is because it was used in the industry to control realm at the earliest stage. Single slice machine from inside chip have CPU appropriation processor to develop only since then. At the earliest stage of design the principle is to pass to integrate a great deal of peripherals and CPU in a chip, making calculator system smaller, integrating more easily into complicated of but to mention to request a strict control equipments in the middle. The INTEL Z80 is the processor which designed according to this kind of thought at the earliest stage, from now on, single slice the development of the machine and appropriation processor went by different roads then.The single slice of the earlier period all of machines are 8 or 4.Among them, the INTEL is most successful of 8031, because of in brief dependable but the function was quite good to acquire very big good opinion.Henceforth at 8031 up developed MCS51 serieses a single slice machine system.According to the single slice of this system machine system is still in the extensive usage till now.Because the industry controls the exaltation of[with] realm request, starting appearing 16 single slice machine, but because sex price wanted to don't get a very extensive application than the disregard.Develop greatly along with the consumption electronics product after 90's, the single slice machine technique got a huge exaltation. Along with the extensive application of INTEL i960 serieses especially later ARM series, the 32 single slice machines replaces 16 single slice the high level position of the machine quickly, and gets into an essential market. And traditional of 8 single slice the function of the machine also got to fly to raise soon, handling an ability to compare with to raise few a hundred folds in 80's.Currently, 32 single slice of the high level with main machine already over 300 MHz, the function keeps appropriation processor of making track for the mid 90's, and the common model number factory price drop into to USD 1, tallest carry of model number also only USD 10.The contemporary and single slice machine system has already no longer developed and used just under the naked machine environment, the in great quantities appropriative built-in operate system is applied extensively in the whole seriousness of the single slice is on board. But Be using the high level of handheld PC and cellular phone core processing single slice the machine even can use appropriative Windows and the Linux operate system directly.Single slice the machine ratio appropriation processor is the most suitable to match to apply in the built-in system, so it got the most applications. In fact the single slice machine is an amount the most calculators are in the world. The modern mankind are living medium use of assemble in almost each electronics and machine product have a single slice machine. All have 1-2 single slice machine in the computer accessoriness such as cellular phone, telephone, calculator, home appliances, electronics toy, handheld PC and mouse etc.. And personal computer in would also capable number not a few single slice the machine be working. Provide with morethan 40 departments a single slice machine generally on the car; complicated industry's controlling the top of the system even may has single several hundred pedestals slices machine to work in the meantime! Single slice the amount of the machine not only far above the PC machine and other calculations of comprehensive, even than the mankind's amount still want have another二、翻译内容单片机也被称为微控制器(Microcontroller),是因为它最早被用在工业控制领域。
单片机毕业设计外文文献翻译

英文原文:80C518051 single-chip micro-computer, referred to as microcontrollers, there are known as micro-controller, a micro-computer re -To branch. SCM is developed in the mid 70s a large-scale integrated circuit chip, a CPU, RAM, ROM, I / O interfaces and interrupt system on the same silicon device. Since the 80s, Microcontroller rapid development, all kinds of new products are constantly emerging, there have been many high-performance of new models now become the field of factory automation and control of the pillar industries.Pin Function:MCS-51 is a standard 40-pin DIP IC chip, pin distribution ---- microcontroller pin diagram please refer to:P0.0 ~ P0.7 P0 port 8-bit bidirectional port lines (in the pin 39 to No. 32 terminal). P1.0 ~ P1.7 P1 port 8-bit bidirectional port line (pin 1 in the No. 8 terminal).P2.0 ~ P2.7 P2 port 8-bit bidirectional port lines (in the pin terminal 21 ~ 28).P3.0 ~ P3.7 P3 port 8-bit bidirectional port lines (in the pin terminal 10 ~ 17).This four I / O port has not exactly the same function, we can get to learn, and other books though, but written in too deep, difficult to understand for beginners, here are according to my own expression to write the I believe that you can understand.P0 port has three functions:1, external expansion memory, as the data bus (Figure 1 in D0 ~ D7 of data bus interface)2, external expansion memory, as the address bus (Figure 1 in A0 ~ A7 to address bus interface)3, is not extended, it can do a general I / O to use, but within the supreme pull-up resistor, as an input or output should be connected to an external pull-up resistor.P1 port Zhizuo I / O port to use: its internal pull-up resistor.P2 port has two functions:1,An extended external memory when used as an address bus2, doing a general I / O port used, and their internal pull-up resistor;P3 port has two functions:As well as I / O using the external (the internal pull-up resistor), there are some special features, from a special register to set the specific features please refer to our explanation behind the pin.Internal EPROM of the microcontroller chip (for example, 8751), for the writing process required to provide specialized programming and programming pulse power, these signals are also provided in the form from the signal pin, and Namely: programming pulse: 30 feet (ALE / PROG)Programming voltage (25V): 31 feet (EA / Vpp)In introducing the four I / O port referred to a "pull-up resistor" Then, pull-up resistor is what Dongdong do? What role does he play? Said the resistance that is of course, is a resistor, when as an input, the pull-up resistor pulled its potential, if the input is low you can provide a current source; Therefore, if the P0 port as long as the input, in the high impedance state, only an external pull-up resistor to be effective. ALE / PROG address latch control signal: in a system is extended, ALE is used to control the P0 port output low 8-bit address latch latch get together in order to achieve low address and data segregation. (In the back on the expansion of the curriculum, we will see the 8051 expansion of EEPROM circuit, the ALE and the 74LS373 in Figure G-latches connected to the external CPU to access when the time to lock the address low address, the P0 port output. ALE may be high may also be low, when the ALE is high, allowing address latch signal when accessing external memory, ALE signals a negative transition (from positive to negative) P0 port on the lower eight address signals into the latch. when ALE is low, when, P0 port on the content and the output latch line. on the latch, and we will be introduced later.In the absence of access to external memory during the period, ALE 1 / 6 oscillator frequency output cycle (ie, frequency of 6 points), when access to external memory to 1 / 12 oscillator cycle, the output (12 min frequency). From here we can see that when the system does not extend when the ALE will be 1 / 6 cycle, fixed frequency oscillator output, so can be used as an external clock, or the use of an external timing pulse.PORG pulse input for the program: In the fifth lesson MCU's internal structure and composition, we know that in 8051 within the a 4KB or 8KB of program memory (ROM), ROM's role is to be used to store user needs implementation of the program, then we are into how to write good programs into this ROM in it? Is actually programmed into the pulse input can be written, this pulse input port is PROG. PSEN external program memory read strobe: In reading an external ROM, PSEN low effective, in order to achieve an external ROM module read.1, the internal ROM reading, PSEN is not action;2, external ROM reading at each machine cycle will move twice;3, external RAM read, the two PSEN pulse is skipped will not be output;4, external ROM, and ROM-foot-phase OE.See Figure 2 - (8051 extension 2KB EEPROM circuit in Figure PSEN and expansion ROM in the OE pin-phase)EA / VPP access and sequence memory control signals1, then high time:CPU reads the internal program memory (ROM)Expansion of the external ROM: When reading the internal program memory than0FFFH (8051) 1FFFH (8052) automatically reads the external ROM.2, then low when: CPU to read external program memory (ROM). In the previous study, we are aware, there is no internal ROM MCU 8031, then 8031 microcontroller in the application, this pin is a low level of direct.3,8751 Shaoxie internal EPROM, to make use of this pin input voltage of 21V forShao Xie.RST Reset signal: when the input signal continuously high for more than two machine cycles when it is effective to complete the MCU reset initialization, when the reset program counter PC = 0000H, ie, after reset from the program memory of the 0000H unit to read the first script.External crystal oscillator pins XTAL1 and XTAL2. When using the chip internal clock, this two-pin for external quartz crystal and fine-tuning capacitor; when using an external clock, used to access an external clock pulse signal.VCC: Power Supply +5 V inputVSS: GND Ground.A VR and the pic are 8051 different structures with 8-bit microcontrollers, because structure is different, so assembly instructions are different, but distinct from the useof CISC instruction set of the 8051, they are RISC instruction set, and only a few dozen instructions, most instructions are single instruction cycle instruction, so in the same crystal frequency, faster than the 8051. Another PIC 8-bit microcontroller in previous years, is the world's largest MCU shipments, followed by Freescale microcontroller.ARM is actually 32-bit microcontroller, its internal resources (registers and peripheral functions) than in 8051 and PIC, A VR should be a lot more, with the computer's CPU chip is very close. Commonly used in mobile phones, routers and so on.DSP is actually a special kind of microcontroller, which from 8-32 are available here. It is specifically used to calculate the digital signals. Operation in some formulas, it's fastest computers than the current home of the CPU even faster. For example, the general 32-bit DSP instruction cycle in an op-End a 32-digit x 32-digit product coupled with a 32-digit. Applied to certain pairs of real-time processing requirements of the higher places中文译文:8051单片微型计算机简称为单片机,又称为微型控制器,是微型计算机的一个重要分支。
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毕设外文翻译--单片机基础毕业设计(论文)外文资料翻译系别: 电气系专业: 电气工程及其自动化班级:姓名:学号:外文出处: Atomation Professional English Course(用外文写) Pressed By Machinery Industry Press附件:1、外文原文;2、外文资料翻译译文。
指导教师评语:签字:年月日注:请将该封面与附件装订成册。
1、外文原文(复印件)A: Fundamentals of Single-chip MicrocomputerThe single-chip microcomputer is the culmination of both the development of the digital computer and the integrated circuit arguably the tow most significant inventions of the 20th century [1].These tow types of architecture are found in single-chip microcomputer. Some employ the split program/data memory of the Harvard architecture, shown in Fig.3-5A-1, others follow the philosophy, widely adapted for general-purpose computers and microprocessors, of making nological distinction between program and data memory as in the Princeton architecture, shown in Fig.3-5A-2.In general terms a single-chip microcomputer is characterized by the incorporation of all the units of a computer into a single device, as shown in Fig3-5A-3.ProgramInput& memoryOutputCPU unitDatamemoryFig.3-5A-1 A Harvard typeInput&Output CPU memoryunitFig.3-5A-2. A conventional Princeton computerExternal Timer/ System Timing Counter clock componentsSerial I/OReset ROMPrarallelI/OInterrupts RAMCPUPowerFig3-5A-3. Principal features of a microcomputerRead only memory (ROM).ROM is usually for the permanent,non-volatile storage of an applications program .Many microcomputers and microcontrollers are intended for high-volume applications and hence the economical manufacture of the devices requires that the contents of the program memory be committed permanently during the manufacture of chips . Clearly, this implies a rigorous approach to ROM code development since changes cannot be made after manufacture .This development process may involve emulation using a sophisticated development system with a hardware emulation capability as well as the use of powerful software tools.Some manufacturers provide additional ROM options by including in their range devices with (or intended for use with) user programmable memory. The simplest of these is usually device which can operate in a microprocessor mode by using some of the input/output lines as an address and data bus for accessing external memory. This type of device can behave functionally as the single chip microcomputer from which itis derived albeit with restricted I/O and a modified external circuit. The use of these ROMless devices is common even in production circuits where the volume doesnot justify the development costs of custom on-chip ROM[2];there can still be a significant saving in I/O and other chips compared to a conventional microprocessor based circuit. More exact replacement for ROM devices can be obtained in the form of variants with 'piggy-back'EPROM(Erasable programmable ROM )sockets or devices with EPROM insteadof ROM 。
These devices are naturally more expensive than equivalent ROM device, but do provide complete circuit equivalents. EPROM based devices are also extremely attractive for low-volume applications where they provide the advantages of a single-chip device, in terms of on-chip I/O, etc. ,with the convenience of flexible user programmability.Random access memory (RAM).RAM is for the storage of workingvariables and data used during program execution. The size of this memory varies with device type but it has the same characteristic width (4,8,16 bits etc.) as the processor ,Special function registers, such as stack pointer or timer register are often logically incorporated intothe RAM area. It is also common in Harard type microcomputers to treat the RAM area as a collection of register; it is unnecessary to make distinction between RAM and processor register as is done in the case of a microprocessor system since RAM and registers are not usuallyphysically separated in a microcomputer .Central processing unit (CPU).The CPU is much like that ofany microprocessor. Many applications of microcomputers and microcontrollers involve the handling of binary-coded decimal (BCD) data (for numerical displays, for example) ,hence it is common to find that the CPU is well adapted to handling this type of data .It is also common to find good facilities for testing, setting and resetting individualbits of memory or I/O since many controller applications involve the turning on and off of single output lines or the reading the single line.These lines are readily interfaced to two-state devices such as switches, thermostats, solid-state relays, valves, motor, etc.Parallel input/output. Parallel input and output schemes vary somewhat in different microcomputer; in most a mechanism is provided to at least allow some flexibility of choosing which pins are outputs and which are inputs. This may apply to all or some of the ports. Some I/O lines are suitable for direct interfacing to, for example, fluorescent displays, or can provide sufficient current to make interfacing other components straightforward. Some devices allow an I/O port to be configured as a system bus to allowoff-chip memory and I/O expansion. This facility is potentiallyuseful as a product range develops, since successive enhancements may become too big for on-chip memory and it is undesirable not to build on the existing software base.Serial input/output .Serial communication with terminaldevices is common means of providing a link using a small number of lines. This sort of communication can also be exploited for interfacing special function chips or linking several microcomputers together .Both the common asynchronous synchronous communication schemes require protocols that provide framing (start and stop) information .This can be implemented as a hardware facility or U(S)ART(Universal(synchronous) asynchronous receiver/transmitter) relieving the processor (and the applications programmer) of this low-level, time-consuming, detail. t is merely necessary to selected a baud-rate and possibly other options(number of stop bits, parity, etc.) and load (or read from) the serial transmitter (or receiver) buffer. Serialization of the data in the appropriate format is then handled by the hardware circuit.Timing/counter facilities. Many application of single-chipmicrocomputers require accurate evaluation of elapsed realtime .This can be determined by careful assessment of the execution time of each branch in a program but this rapidly becomes inefficient for all but simplest programs .The preferred approach is to use timer circuit that can independently count precise time increments and generate an interrupt after a preset time has elapsed .This type of timer is usually arranged to be reloadable with the required count .The timer then decrements this value producing an interrupt or setting a flag when the counter reaches zero. Better timers then have the ability to automatically reload the initial count value. This relieves the programmer of the responsibility of reloading the counter and assessing elapsed time before the timer restarted ,which otherwise wound be necessary if continuous precisely timed interrupts were required (as in a clock ,for example).Sometimes associated with timer is an event counter. With this facility there is usually a special input pin ,that can drive the counter directly.Timing components. The clock circuitry of most microcomputers requires only simple timing components. If maximum performance is required,a crystal must be used to ensure the maximum clock frequency is approached but not exceeded. Many clock circuits also work with aresistor and capacitor as low-cost timing components or can be driven from an external source. This latter arrangementis useful is external synchronization of the microcomputer is required.WORDS AND TERMSculmination n.顶点spilt adj.分离的volatile n. 易变的commit v.保证albeit conj.虽然custom adj.定制的variant adj.不同的piggy-back adj.背负式的socket n. 插座B:PLC[1]PLCs (programmable logical controller) face ever more complex challenges these days . Where once they quietly replaced relays and gave an occasional report to a corporate mainframe, they are now grouped into cells, given new job and new languages, and are forced to compete against a growing array of control products. For this year's annual PLC technology update ,we queried PLC makers on these topics and more .Programming languagesHigher level PLC programming languages have been around for sometime ,but lately their popularity has mushrooming. "As Raymond Leveille,vice president & general manager, Siemens Energy &Automation .inc; Programmable controls are being used for more and more sophisticated operations, languages other than ladder logic become more practical, efficient, and powerful. For example, it's very difficult to write a trigonometric function using ladder logic ."Languages gaining acceptance include Boolean, control system flowcharting, and such function chart languages as Graphcet and its variation .And there's increasing interest in languages like C and BASIC.PLCs in process controlThus far, PLCs have not been used extensively for continuous process control .Will this continue? "The feeling that I've gotten," says Ken Jannotta, manger, product planning, series One and Series Sixproduct ,at GE Fanuc North America ,'is that PLCs will be used in the process industry but not necessarily for process control."Several vendors -obviously betting that the opposite willhappen -have introduced PLCs optimized for processapplication .Rich Ryan, manger, commercial marketing, Allen-bradley Programmable Controls Div., cites PLCs's increasing use such industries as food ,chemicals ,and petroleum. Ryan feels there are two types of applications in which they're appropriate. "one," he says," is where the size of the process control system that's being automated doesn'tjustify DCS[distributed control system].With the starting price tags of chose products being relatively high, a programmable controller makes sense for small, low loop count application .The second is where youhave to integrate the loop closely with the sequential logical .Batch controllers are prime example ,where the sequence and maintaining the process variable are intertwined so closely that the benefits of having a programmable controller to do the sequential logical outweighs some of the disadvantages of not having a distributed control system."Bill Barkovitz, president of Triconex, predicts that "all future controllers that come out in the process control system business will embrace a lot of more PLC technology and a lot more PLC functionality than they ever did before ."Communications and MAPCommunications are vital to an individual automation cell and to be automated factory as a whole. We've heard a lot about MAP in the last few years ,and a lot of companies have jumped on the bandwagon.[2]Many, however, were disappointed when a fully-defined and completed MAP specification didn't appear immediately .Says Larry Komarek: "Right now, MAP is still a moving target for the manufacturers, a specification that is not final .Presently, for example. people are introducing products to meet the MAP2.1standard .Yet2.1-based products will be obsolete when the new standard for MAP3.0 is introduced."Because of this, many PLC vendors are holding off on full MAP implementations. Omron, for example, has an ongoingMAP-compatibility program;[3]but Frank Newburn, vice president of Omron's Industrial Division ,reports that because of the lack of a firm definition ,Omron's PLCs don't yet talk to MAP.Since it's unlikely that an individual PLC would talk to broad MAP anyway, makers are concentrating on proprietary networks. According to Sal Provanzano, users fear that if they do get on board and vendors withdraw from MAP, they'll be the ones left holding a communications structure that's not supported.Universal I/OWhile there are concerns about the lack of compatible communications between PLCs from different vendors, the connectionat the other end-the I/O-is even more fragmented .With rare exceptions, I/O is still proprietary .Yet there are those who feel that I/O will eventually become more universal .GE Fanuc is hoping to do that with its Genius smart I/O line. The independent I/O makers are pullingin the same direction.Many say that I/O is such a high-value item that PLC makers will always want to keep it proprietary .As Ken Jannotta, says: "The I/O is going to be a disproportionate amount of the hardware sale. Certainly each PLC vendor is going to try to protect that. "For that reason, he says, PLC makers won't begin selling universal I/O system from other vendor. "if we start selling that kind of product, "says jannotta, "what do we manufacture?"With more intelligent I/O appearing, Sal Provanzano feels this will lead to more differentiation among I/O from different makers. "Where the I/O becomes extremely intelligent and becomes part of the system, "he says, "it really is hard to define which is the I/O and which is CPU. Itreally CPU, if you will, is equally integrated into the system as theI/O."Connecting PLC I/O to PCsWhile different PLCs probably will continue to use proprietary I/O, several vendors make it possible to connect5 their I/O to IBM PC-compatible equipment. Alle-bradeley, Could, and Cincinnati Milacron already have, and rumor has it that GE is planning something along these same lines .[4]Bill Ketelhut, manage of product planning at GE Fanuc North America ,sees this sort of thing as alternative to universalI/O."I think the trend ,instead of toward universal I/O, will bemultiple host interface ," he says .Jodie Glore ,director of marking, Square D Automation Products, Views it as another indication that PLCs are, and have been for some time, industrial computers.PLCs VS PCsIf the IBM 7552, the Action Instruments BC22,and other computers are appearing on the factory floor, won't this mean new competition for PLCs? Rich Ryan: "There are some control functions that are better jobs for computers. Programmable controllers have been forced to fit into those applications. "Yet, the majority of vendors we surveyed don't like the "PC invasion" will pose a problem for them .Most said that PLCs and PCs are enough apart in architecture that they will usually do the control. They don't feel that PCs will take jobs from PLCs just because PLC I/O modules can now be connected to PCs; they believe this simply means that PLCs and PCs will be able to share the same data."There are inherent architectural differences between a general purpose computer," says Rich Ryan, "and a programmablecontroller .There are hardware constructs built into almost every manufacture's programmable controller today that customize the hardware to run ladder logic and to solve machine code. "One fundamental difference he cites is called state of the machine .Ryan: "When you shut the machine off, or interrupt the cycle, or you jump to another spot in the cycle, programmable controllers inherently remember the state of the machine: what the timers were, what the counters were ,what the states of all the latches were .Computers don't inherently do that."WORDS AND TERMSbet v.确信optimized n.优化程序corporate adj.共同的mushroom v.迅速发展trigonometric function 三角函数vendor n.厂商tag n.标签smart adj.智能型的compatible adj.兼容的2、外文资料翻译译文单片机基础单片机是电脑和集成电路发展的巅峰,有据可查的是他们也是20世纪最有意义的两大发明。