MEMORY存储芯片STM32F103RCT6中文规格书
MEMORY存储芯片GD32F103RCT6中文规格书
3.Functional description3.1. ARM® Cortex™-M3 coreThe Cortex™-M3 processor is the latest generation of ARM®processors for embeddedsystems. It has been developed to provide a low-cost platform that meets the needs of MCUimplementation, with a reduced pin count and low-power consumption, while deliveringoutstanding computational performance and an advanced system response to interrupts.⏹32-bit ARM®Cortex™-M3 processor core⏹Up to 108 MHz operation frequency⏹Single-cycle multiplication and hardware divider⏹Integrated Nested Vectored Interrupt Controller (NVIC)⏹24-bit SysTick timerThe Cortex™-M3 processor is based on the ARMv7 architecture and supports both Thumband Thumb-2 instruction sets. Some system peripherals listed below are also provided byCortex™-M3:⏹Internal Bus Matrix connected with I-Code bus, D-Code bus, System bus, PrivatePeripheral Bus (PPB) and debug accesses.⏹Nested Vectored Interrupt Controller (NVIC).⏹Flash Patch and Breakpoint (FPB).⏹Data Watchpoint and Trace (DWT).⏹Instrumentation Trace Macrocell (ITM).⏹Embedded Trace Macrocell (ETM).⏹Serial Wire JTAG Debug Port (SWJ-DP).⏹Trace Port Interface Unit (TPIU).⏹Memory Protection Unit (MPU).3.2. On-chip memory⏹Up to 3072 Kbytes of Flash memory⏹Up to 96 Kbytes of SRAMThe ARM®Cortex™-M3 processor is structured in Harvard architecture which can useseparate buses to fetch instructions and load/store data. 3072 Kbytes of inner Flash and 96Kbytes of inner SRAM at most is available for storing programs and data, both accessed (R/W)at CPU clock speed with zero wait states.The Table 2-4. GD32F103xx memory mapshows the memory map of the GD32F103xx series of devices, including code, SRAM,peripheral, and other pre-defined regions.3.3. Clock, reset and supply management⏹Internal 8 MHz factory-trimmed RC and external 4 to 16 MHz crystal oscillator⏹Internal 40 KHz RC calibrated oscillator and external 32.768 KHz crystal oscillator⏹Integrated system clock PLL⏹ 2.6 to 3.6 V application supply and I/Os⏹Supply Supervisor: POR (Power On Reset), PDR (Power Down Reset), and low voltagedetector (LVD)The Clock Control unit provides a range of frequencies and clock functions. These include anInternal 8M RC oscillator (IRC8M), a High Speed crystal oscillator (HXTAL), a Low SpeedInternal 40K RC oscillator (IRC40K), a Low Speed crystal oscillator (LXTAL), a Phase LockLoop (PLL), a HXTAL clock monitor, clock prescalers, clock multiplexers and clock gatingcircuitry. The frequency of AHB, APB2 and the APB1 domains can be configured by eachprescaler. The maximum frequency of the AHB, APB2 and APB1 domains is 108 MHz/108MHz/54 MHz. See Figure 2-8. GD32F103xx clock tree for details.GD32F10x Reset Control includes the control of three kinds of reset: power reset, systemreset and backup domain reset.The system reset resets the processor core and peripheralIP components except for the SW-DP controller and the Backup domain.Power-on reset(POR) and power-down reset (PDR) are always active, and ensures proper operation startingfrom/down to 2.6 V. The device remains in reset mode when V DD is below a specifiedthreshold. The embedded low voltage detector (LVD) monitors the power supply, comparesit to the voltage threshold and generates an interrupt as a warning message for leading theMCU into security.Power supply schemes:⏹V DD range: 2.6 to 3.6 V, external power supply for I/Os and the internal regulator.Provided externally through V DD pins.⏹V SSA, V DDA range: 2.6 to 3.6 V, external analog power supplies for ADC, reset blocks,RCs and PLL. V DDA and V SSA must be connected to V DD and V SS, respectively.⏹V BAT range: 1.8 to 3.6 V, power supply for RTC, external clock 32 KHz oscillator andbackup registers (through power switch) when V DD is not present.3.4. Boot modesAt startup, boot pins are used to select one of three boot options:⏹Boot from main flash memory (default)⏹Boot from system memory⏹Boot from on-chip SRAMThe boot loader is located in the internal boot ROM memory (system memory). It is used toreprogram the Flash memory by using USART0 (PA9 and PA10), if devices areGD32F103xF/G/I/K, USART1 (PA2 and PA3) is also available for boot functions. It also can453.5. Power saving modesThe MCU supports three kinds of power saving modes to achieve even lower powerconsumption. They are sleep mode, deep-sleep mode, and standby mode.These operatingmodes reduce the power consumption and allow the application to achieve the best balancebetween the CPU operating time, speed and power consumption.⏹Sleep modeIn sleep mode, only clock of Cortex™-M3 is off. All peripherals continue to operate andany interrupt/event can wake up the system.⏹Deep-sleep modeIn deep-sleep mode, all clocks in the 1.2V domain are off, and all of IRC8M, HXTAL andPLLs are disabled. Only the contents of SRAM and registers are retained. Any interruptor wakeup event from EXTI lines can wake up the system from the deep-sleep modeincluding the 16 external lines, the RTC alarm, the LVD output, USB Wakeup and EthernetWakeup. When exiting the deep-sleep mode, the IRC8M is selected as the system clock.⏹Standby modeIn standby mode, the whole 1.2V domain is power off, the LDO is shut down, and all ofIRC8M, HXTAL and PLL are disabled.The contents of SRAM and registers (exceptBackup registers) are lost. There are four wakeup sources for the Standby mode,including the external reset from NRST pin, the RTC alarm, the FWDGT reset, and therising edge on WKUP pin.3.6. Analog to digital converter (ADC)⏹12-bit SAR ADC⏹Up to 1 MSPS for 12-bit resolution⏹Analog input signal voltage range: V SSA to V DDA (2.6 to 3.6 V)⏹Temperature sensorUp to three 12-bit multi-channel ADCs are integrated in the device. Each has a total of up to21 multiplexed external channels. An analog watchdog block can be used to detect thechannels, which are required to remain within a specific threshold window. A configurablechannel management block of analog inputs also can be used to perform conversions insingle, continuous, scan or discontinuous mode.The ADCs can be triggered from the events generated by the general level 0 timers (TIMERx)or the advanced timers (TIMER0 and TIMER7) with internal connection. The temperaturesensor generates a voltage that varies linearly with temperature. The analog supply voltageV DDA can vary from 2.6 V to 3.6 V. The output voltage of temperature sensor is internallyconnected to the ADC_IN16 input channel.3.7. Digital to analog converter (DAC)⏹Two 12-bit DACs with independent output channels⏹8-bit or 12-bit mode in conjunction with the DMA controllerThe two 12-bit buffered DACs are used to generate variable analog outputs. The DACchannels can be triggered by the timer or EXTI with DMA support.In dual DAC channeloperation, conversions could be done independently or simultaneously. The maximum outputvalue of the DAC is V REF+.3.8. DMA⏹7 channel DMA0 controller and 5 channel DMA1 controller⏹Peripherals supported: Timers, ADC, SPIs, I2Cs, USARTs, DAC, I2S and SDIOThe direct memory access (DMA) controllers provide a hardware method of transferring databetween peripherals and/or memory without intervention from the CPU, thereby freeing upbandwidth for other system functions. Three types of access method are supported:peripheral to memory, memory to peripheral, memory to memory.Each channel is connected to fixed hardware DMA requests. The priorities of DMA channelrequests are determined by software configuration and hardware channel number.Transfersize of source and destination are independent and configurable.3.9. General-purpose inputs/outputs (GPIOs)⏹Up to 112 fast GPIOs, all mappable on 16 external interrupt lines⏹Analog input/output configurable⏹Alternate function input/output configurableThere are up to 112 general purpose I/O pins (GPIO), named PA0 ~ PA15, PB0 ~ PB15, PC0~ PC15, PD0 ~ PD15, PE0 ~ PE15, PF0 ~ PF15 and PG0 ~ PG15 for the device to implementlogic input/output functions. Each GPIO port has related control and configuration registers tosatisfy the requirements of specific applications. The external interrupt on the GPIO pins ofthe device have related control and configuration registers in the Interrupt/event ControllerUnit (EXTI). The GPIO ports are pin-shared with other alternative functions (AFs) to obtainmaximum flexibility on the package pins. The GPIO pins can be used as alternative functionalpins by configuring the corresponding registers regardless of the AF input or output pins. Eachof the GPIO pins can be configured by software as output (push-pull or open-drain), input,peripheral alternate function or analog mode. Each GPIO pin can be configured as pull-up,pull-down or no pull-up/pull-down. All GPIOs are high-current capable except for analog mode.3.10. Timers and PWM generation⏹Up to two 16-bit advanced timer (TIMER0 & TIMER7), ten 16-bit general timers, and two16-bit basic timer (TIMER5 & TIMER6)⏹Up to 4 independent channels of PWM, output compare or input capture for each andexternal trigger input⏹16-bit, motor control PWM advanced timer with programmable dead-time generation foroutput match⏹Encoder interface controller with two inputs using quadrature decoder⏹24-bit SysTick timer down counter⏹ 2 watchdog timers (Free watchdog timer and window watchdog timer)The advanced timer (TIMER0 & TIMER7) can be seen as a three-phase PWM multiplexedon 6 channels. It has complementary PWM outputs with programmable dead-time generation.It can also be used as a complete general timer. The 6 independent channels can be usedfor。
STM32F103增强型中文数据手册
数据手册STM32F103x6STM32F103x8 STM32F103xB 增强型，32位基于ARM核心的带闪存、USB、CAN的微控制器7个16位定时器、2个ADC 、9个通信接口功能■内核：ARM 32位的Cortex™-M3 CPU− 72MHz，1.25DMips/MHz（Dhrystone2.1），0等待周期的存储器−单周期乘法和硬件除法■存储器−从32K字节至128K字节的闪存程序存储器−从6K字节至20K字节的SRAM■时钟、复位和电源管理− 2.0至3.6伏供电和I/O管脚−上电/断电复位(POR/PDR)、可编程电压监测器(PVD)−内嵌4至16MHz高速晶体振荡器−内嵌经出厂调校的8MHz的RC振荡器−内嵌40kHz的RC振荡器− PLL供应CPU时钟−带校准功能的32kHz RTC振荡器■低功耗−睡眠、停机和待机模式−V BAT为RTC和后备寄存器供电■2个12位模数转换器，1us转换时间(16通道) −转换范围：0至3.6V−双采样和保持功能−温度传感器■DMA−7通道DMA控制器−支持的外设：定时器、ADC、SPI、I2C和USART■多达80个快速I/O口− 26/37/51/80个多功能双向5V兼容的I/O口−所有I/O口可以映像到16个外部中断■调试模式−串行线调试(SWD)和JTAG接口■多达7个定时器−多达3个16位定时器，每个定时器有多达4个用于输入捕获/输出比较/PWM或脉冲计数的通道− 16位6通道高级控制定时器−多达6路PWM输出−死区控制、边缘/中间对齐波形和紧急制动−2个看门狗定时器(独立的和窗口型的)−系统时间定时器：24位自减型■多达9个通信接口−多达2个I2C接口(SMBus/PMBus)−多达3个USART接口，支持ISO7816，LIN，IrDA接口和调制解调控制−多达2个SPI同步串行接口(18兆位/秒)− CAN接口(2.0B 主动)− USB 2.0全速接口■ECOPACK®封装（兼容RoHS）表一 器件列表参考基本型号STM32F103x6 STM32F103C6,STM32F103R6,STM32F103T6STM32F103x8 STM32F103C8, STM32F103R8,STM32F103V8, STM32F103T8 STM32F103xB STM32F103RB, STM32F103VB,STM32F103C8数据手册1 介绍 (3)2 规格说明 (3)2.1 器件一览 (4)2.2 概述 (5)3 管脚定义 (11)4 存储器映像 (19)5 电气特性 (20)6 封装参数 (20)7 订货代码 (20)7.1 后续的产品系列 (21)8 版本历史 (21)附录A 重要提示 (22)A.1PD0和PD1在输出模式下 (22)A.2ADC自动注入通道 (22)A.3ADC的混合同步注入+交替模式 (22)A.4ADC通道0 (22)1介绍本文给出了STM32F103xx增强型的订购信息和器件的机械特性。
STM32F103RET6中文资料_数据手册_参数
STM32F103RCT6使用说明
STM32开发板使用手册风帆 STM32开发板是风帆电子为初学者学习STM32 Cortex M3 系列ARM 而设计的学习板。
以STM32F103RCT6芯片为核心，配套寸彩色TFT屏模块，板载UART、USB、ADC电压调节、按键、JTAG接口、彩屏接口、流水灯、SD卡接口、IO引出口等多种硬件资源。
v1.0 可编辑可修改JTA2个LEDGPIOA引出1O USB 串口DS10B 20预HS0038红外接红外温度传感器连接GPIOB@C引出IO OLED@LCD 共用接口STM32F103寸LCD 接485芯片 RS485接口 1：A; 3：BNRF24L01W25Q16 FLASHSD 卡接口（在JF24C 模块预留GPIOC @D 引出IO蜂鸣器跳PS/2鼠标键盘三个按键： WAKEUPRESET按键Rs232电源开关 USB 接口 电源指自恢复保MAX232电源芯24c02、5V 电源输出； 线序为： GND/GND/5V BOOT 设置 线序为：GND /GND BOOT1/BOOT0此板子不管硬件还是软件完全无缝接兼容正点原子的MINSTM32，并对MINSTM32进行了完美的升级，让我们用最少的钱做更多的事，具体升级的部分包括：1、C PU的升级利用ST意法半导体的CPU兼容性强的优点，此板采用比STM32F103RBT6性能更强、且完全兼容的的STM32F103RCT6升级CPU，把完美的MINNI STM板子的功能发挥到极致，具体2个CPU的主要资源对比如下：可以看出，FLASH增加了一倍，达到256K，RAM也增加了1倍,让我们不用再为FLASH\RAM小而烦恼，使我们的存储空间更为强大；增加了一个16位普通IC/OC/PWM)，2个16位基本(IC/OC/PWM)，1个STI，2个USART，这里比STM32F103RB还多了一个DAC通道，这个STM32F103RB是没有的2、由于STM32F103RCT6有多达5个USART，因此在这个开发板上我们增加了个RS485芯片，我们可以进行485通信；3、STM32F103RCT6有多达5个USART，其中有3个支持7816协议，可以实现智能卡的设计，对于想学习、研究、设计智能一卡通的同学最好的选择；4、STM32F103RCT6比STM32F103RBT6多一个DAC通道，我们可以用杜邦线从我们的引出IO引脚上引出引脚，进行学习、设计。
stm32f103中文资料
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STM32F103x8, STM32F103xB数据手册
目录
1 介绍......................................................................................................................................................... 4 2 规格说明.................................................................................................................................................. 5
stm32f103中文手册[1]
![stm32f103中文手册[1]](https://img.taocdn.com/s3/m/f9dc370982c4bb4cf7ec4afe04a1b0717fd5b3fc.png)
STM32F103中文手册概述32位ARM® Cortex®-M3内核，最高运行频率72 MHz从16 KB到1 MB的闪存，从6 KB到96 KB的SRAM从36到144个引脚的不同封装，支持LQFP、BGA、TFBGA、UFBGA和V FQFPN等从1.65 V到3.6 V的宽电源电压范围，支持低功耗模式和电池供电从-40°C到+105°C的工作温度范围多达11个通信接口，包括3个USART、2个UART、2个I2C、2个SPI、1个CAN和1个USB 2.0全速多达15个定时器，包括7个16位通用定时器、2个16位基本定时器、2个16位高级定时器、2个32位定时器和2个看门狗定时器多达3个12位模数转换器（ADC），每秒可采样1.2 M次两路12位数模转换器（DAC）多达80个外部中断/事件源多达112个GPIO端口，支持5 V耐压CRC计算单元，用于检测数据传输错误实时时钟（RTC），支持日历功能和闹钟功能嵌入式内存保护单元（MPU），用于增强应用程序安全性嵌入式调试支持，包括串行线调试（SWD）和JTAG接口7层DMA控制器，支持所有外设数据传输可选的双银行闪存模式，支持实时软件更新存储器映射STM32F103系列单片机的存储器映射如下图所示：![存储器映射]代码区：包括闪存和系统存储器。
闪存用于存储用户程序代码和数据。
系统存储器用于存储引导加载程序（bootloader）和设备标识符。
SRAM区：包括SRAM1和SRAM2。
SRAM1用于存储用户程序数据和堆栈。
SRAM2用于存储备份寄存器和备份域。
外设区：包括APB1外设、APB2外设和AHB外设。
APB1外设和APB2外设是通过两个高速总线矩阵连接到内核的低速外设。
AHB外设是通过一个高速总线矩阵连接到内核的高速外设。
外部设备区：包括FSMC区域、NOR/PSRAM区域和NAND/CF区域。
STM32F103增强型中文数据手册
数据手册STM32F103x6STM32F103x8 STM32F103xB 增强型，32位基于ARM核心的带闪存、USB、CAN的微控制器7个16位定时器、2个ADC 、9个通信接口功能■内核：ARM 32位的Cortex™-M3 CPU− 72MHz，1.25DMips/MHz（Dhrystone2.1），0等待周期的存储器−单周期乘法和硬件除法■存储器−从32K字节至128K字节的闪存程序存储器−从6K字节至20K字节的SRAM■时钟、复位和电源管理− 2.0至3.6伏供电和I/O管脚−上电/断电复位(POR/PDR)、可编程电压监测器(PVD)−内嵌4至16MHz高速晶体振荡器−内嵌经出厂调校的8MHz的RC振荡器−内嵌40kHz的RC振荡器− PLL供应CPU时钟−带校准功能的32kHz RTC振荡器■低功耗−睡眠、停机和待机模式−V BAT为RTC和后备寄存器供电■2个12位模数转换器，1us转换时间(16通道) −转换范围：0至3.6V−双采样和保持功能−温度传感器■DMA−7通道DMA控制器−支持的外设：定时器、ADC、SPI、I2C和USART■多达80个快速I/O口− 26/37/51/80个多功能双向5V兼容的I/O口−所有I/O口可以映像到16个外部中断■调试模式−串行线调试(SWD)和JTAG接口■多达7个定时器−多达3个16位定时器，每个定时器有多达4个用于输入捕获/输出比较/PWM或脉冲计数的通道− 16位6通道高级控制定时器−多达6路PWM输出−死区控制、边缘/中间对齐波形和紧急制动−2个看门狗定时器(独立的和窗口型的)−系统时间定时器：24位自减型■多达9个通信接口−多达2个I2C接口(SMBus/PMBus)−多达3个USART接口，支持ISO7816，LIN，IrDA接口和调制解调控制−多达2个SPI同步串行接口(18兆位/秒)− CAN接口(2.0B 主动)− USB 2.0全速接口■ECOPACK®封装（兼容RoHS）表一 器件列表参考基本型号STM32F103x6 STM32F103C6,STM32F103R6,STM32F103T6STM32F103x8 STM32F103C8, STM32F103R8,STM32F103V8, STM32F103T8 STM32F103xB STM32F103RB, STM32F103VB,STM32F103C8数据手册1 介绍 (3)2 规格说明 (3)2.1 器件一览 (4)2.2 概述 (5)3 管脚定义 (11)4 存储器映像 (19)5 电气特性 (20)6 封装参数 (20)7 订货代码 (20)7.1 后续的产品系列 (21)8 版本历史 (21)附录A 重要提示 (22)A.1PD0和PD1在输出模式下 (22)A.2ADC自动注入通道 (22)A.3ADC的混合同步注入+交替模式 (22)A.4ADC通道0 (22)1介绍本文给出了STM32F103xx增强型的订购信息和器件的机械特性。
stm32f103中文手册[7]
![stm32f103中文手册[7]](https://img.taocdn.com/s3/m/38586d2658eef8c75fbfc77da26925c52cc59127.png)
stm32f103中文手册1. 概述stm32f103是一款高性能、低功耗、高集成度的32位微控制器，基于ARM Cortex-M3内核，支持Thumb-2指令集，具有72MHz的主频和64KB至512KB的闪存。
stm32f103具有丰富的外设资源，包括多种通信接口、定时器、模数转换器、DMA控制器、触摸感应控制器等，能够满足各种复杂的应用需求。
stm32f103还具有多种低功耗模式，能够实现动态电源管理，降低系统功耗。
stm32f1 03采用多种封装形式，适用于不同的应用场合。
2. 引脚定义stm32f103的引脚定义如图1所示。
stm32f103的引脚分为四类：电源引脚、复位引脚、晶振引脚和功能引脚。
电源引脚包括VDD、VSS、V DDA和VSSA，分别提供数字电源、数字地、模拟电源和模拟地。
复位引脚包括NRST和BOOT0，分别用于复位芯片和选择启动模式。
晶振引脚包括OSC_IN和OSC_OUT，分别连接外部晶振的输入和输出端。
功能引脚包括多达80个可编程的通用输入输出（GPIO）引脚，以及一些专用功能引脚，如JTAG/SWD调试接口、USB接口等。
图1 stm32f103引脚定义3. 系统架构ARM Cortex-M3内核：是stm32f103的核心部分，负责执行程序指令，处理数据和中断等。
存储器：包括闪存（Flash）、静态随机存储器（SRAM）和备份寄存器（Backupregisters），分别用于存储程序代码、数据和备份数据等。
外设总线：包括总线矩阵（Bus matrix）、总线桥（Bus bridge）和外设总线（Peripheralbus），分别用于连接内核、存储器和外设等。
时钟和复位控制：包括时钟树（Clocktree）、复位控制器（Reset controller）和电源管理单元（Power managementunit），分别用于提供时钟信号、复位信号和电源管理等。
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Features•Core: Arm® 32-bit Cortex®-M3 CPU–72 MHz maximum frequency, 1.25DMIPS/MHz (Dhrystone 2.1) performance at 0 wait statememory access–Single-cycle multiplication and hardwaredivision•Memories–256 to 512 Kbytes of Flash memory–up to 64 Kbytes of SRAM–Flexible static memory controller with 4 Chip Select. Supports Compact Flash, SRAM,PSRAM, NOR and NAND memories–LCD parallel interface, 8080/6800 modes •Clock, reset and supply management – 2.0 to 3.6V application supply and I/Os–POR, PDR, and programmable voltage detector (PVD)–4-to-16 MHz crystal oscillator–Internal 8 MHz factory-trimmed RC–Internal 40 kHz RC with calibration–32 kHz oscillator for RTC with calibration •Low power–Sleep, Stop and Standby modes–V BAT supply for RTC and backup registers • 3 × 12-bit, 1 µs A/D converters (up to 21channels)–Conversion range: 0 to 3.6 V–Triple-sample and hold capability–Temperature sensor• 2 × 12-bit D/A converters•DMA: 12-channel DMA controller–Supported peripherals: timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs •Debug mode–Serial wire debug (SWD) & JTAG interfaces–Cortex®-M3 Embedded Trace Macrocell™•Up to 112 fast I/O ports–51/80/112 I/Os, all mappable on 16 external interrupt vectors and almost all 5V-tolerant •Up to 11 timers–Up to four 16-bit timers, each with up to 4IC/OC/PWM or pulse counter and quadrature(incremental) encoder input– 2 × 16-bit motor control PWM timers with dead-time generation and emergency stop– 2 × watchdog timers (Independent and Window)–SysTick timer: a 24-bit downcounter– 2 × 16-bit basic timers to drive the DAC•Up to 13 communication interfaces–Up to 2 × I2C interfaces (SMBus/PMBus)–Up to 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)–Up to 3 SPIs (18 Mbit/s), 2 with I2S interface multiplexed–CAN interface (2.0B Active)–USB 2.0 full speed interface–SDIO interface•CRC calculation unit, 96-bit unique ID •ECOPACK® packagesTable 1.Device summary Reference Part numberSTM32F103xCSTM32F103RC STM32F103VCSTM32F103ZCSTM32F103xDSTM32F103RD STM32F103VDSTM32F103ZDSTM32F103xESTM32F103RE STM32F103ZESTM32F103VE找Memory、FPGA、二三极管、连接器、模块、光耦、电容电阻、单片机、处理器、晶振、传感器、滤波器，上深圳市美光存储技术有限公司July 2018DS5792 Rev 13STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristicsElectrical characteristics STM32F103xC, STM32F103xD, STM32F103xEDS5792 Rev 135.3 Operating conditions5.3.1General operating conditionsTable 9. Thermal characteristicsSymbol RatingsValue Unit T STG Storage temperature range –65 to +150°C T JMaximum junction temperature150°CTable 10. General operating conditionsSymbol ParameterConditionsMin Max Unitf HCLK Internal AHB clock frequency -0 72MHz f PCLK1Internal APB1 clock frequency -0 36f PCLK2Internal APB2 clock frequency -0 72V DDStandard operating voltage -2 3.6V V DDA (1)1.When the ADC is used, refer to Table 59: ADC characteristics .Analog operating voltage(ADC not used)Must be the same potential as V DD (2)2.It is recommended to power V DD and V DDA from the same source. A maximum difference of 300mVbetween V DD and V DDA can be tolerated during power-up and operation.2 3.6VAnalog operating voltage (ADC used)2.43.6V BATBackup operating voltage- 1.8 3.6V P DPower dissipation at T A = 85°C for suffix 6 or T A = 105°C for suffix 7(3)3.If T A is lower, higher P D values are allowed as long as T J does not exceed T J max (see Table 6.7: Thermalcharacteristics on page 132).LQFP144-666mW LQFP100-434LQFP64-444LFBGA100-500LFBGA144-500WLCSP64-400T AAmbient temperature for 6 suffix versionMaximum power dissipation -4085°C Low-power dissipation (4)4.In low-power dissipation state, T A can be extended to this range as long as T J does not exceed T J max (seeTable 6.7: Thermal characteristics on page 132).-40105Ambient temperature for 7 suffix versionMaximum power dissipation -40105°CLow-power dissipation (4)-40125T JJunction temperature range6 suffix version -40105°C7 suffix version-40125STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics5.3.2 Operating conditions at power-up / power-downThe parameters given in Table 11 are derived from tests performed under the ambienttemperature condition summarized in Table 10.Table 11. Operating conditions at power-up / power-downSymbol ParameterConditionsMin Max Unit t VDDV DD rise time rate -0∞µs/VV DD fall time rate20∞Electrical characteristics STM32F103xC, STM32F103xD, STM32F103xE5.3.4 Embedded reference voltageThe parameters given in Table 13 are derived from tests performed under ambienttemperature and V DD supply voltage conditions summarized in Table 10.Table 13. Embedded internal reference voltageSymbol ParameterConditions Min Typ Max Unit V REFINTInternal reference voltage –40 °C < T A < +105 °C 1.16 1.20 1.26V–40 °C < T A < +85 °C1.16 1.20 1.24T S_vrefint(1)1.Shortest sampling time can be determined in the application by multiple iterations.ADC sampling time when reading the internal reference voltage-- 5.117.1(2)2.Guaranteed by design.µsV RERINT(2)Internal reference voltage spread over the temperature rangeV DD = 3 V ±10 mV--10mV T Coeff (2)Temperature coefficient---100ppm/°C。